aboutsummaryrefslogtreecommitdiffstats
path: root/src
Commit message (Expand)AuthorAgeFilesLines
* radeonsi: use radeon_info::nameMarek Olšák2018-08-143-40/+12
* ac: add radeon_info::nameMarek Olšák2018-08-143-2/+12
* radeonsi: split si_clear_buffer to remove enum si_methodMarek Olšák2018-08-146-53/+60
* radeonsi: replace CP_DMA_USE_L2 with enum si_cache_policyMarek Olšák2018-08-142-26/+41
* radeonsi: declare coher in si_copy_bufferMarek Olšák2018-08-141-8/+7
* radeonsi: make PFP_SYNC_ME an explicit CP DMA flagMarek Olšák2018-08-141-17/+25
* radeonsi: don't use emit_data->args in load_emitMarek Olšák2018-08-141-94/+37
* radeonsi: don't use emit_data->args in store_emitMarek Olšák2018-08-141-92/+71
* radeonsi: don't use emit_data->args in atomic_emitMarek Olšák2018-08-143-36/+47
* radeonsi: don't use emit_data->args in build_interp_intrinsicMarek Olšák2018-08-141-19/+13
* radeonsi: inline atomic_fetch_argsMarek Olšák2018-08-141-74/+51
* radeonsi: inline store_fetch_argsMarek Olšák2018-08-141-61/+42
* radeonsi: inline load_fetch_argsMarek Olšák2018-08-141-39/+28
* radeonsi: merge txq_emit and resq_emitMarek Olšák2018-08-141-48/+45
* radeonsi: inline resq_fetch_argsMarek Olšák2018-08-141-62/+34
* radeonsi: inline txq_fetch_argsMarek Olšák2018-08-141-26/+7
* radeonsi: use get_resinfo directly in lower_gather4_integerMarek Olšák2018-08-141-13/+12
* radeonsi: inline tex_fetch_args into build_tex_intrinsicMarek Olšák2018-08-141-222/+188
* radeonsi: remove fetch_args callbacks for ALU instructionsMarek Olšák2018-08-142-103/+55
* radeonsi: move internal TGSI shaders into si_shaderlib_tgsi.cMarek Olšák2018-08-148-319/+348
* radeonsi: implement EXT_window_rectanglesMarek Olšák2018-08-148-2/+111
* gallium/u_blitter: save/restore window rectanglesMarek Olšák2018-08-142-0/+29
* noop: implement set_window_rectanglesMarek Olšák2018-08-141-0/+8
* ddebug: implement set_window_rectanglesMarek Olšák2018-08-141-0/+12
* freedreno/ir3: add support for a6xx 'merged' register setRob Clark2018-08-142-2/+24
* freedreno/ir3: small RA cleanupRob Clark2018-08-142-13/+8
* freedreno/ir3: stop hard-coding FS input regsRob Clark2018-08-147-183/+103
* freedreno/ir3: use r63.x for unused inputsRob Clark2018-08-141-3/+3
* freedreno/ir3: create all inputs in first blockRob Clark2018-08-141-17/+17
* freedreno/ir3: rename s/frag_pos/frag_vcoord/gRob Clark2018-08-142-17/+22
* compiler: add SYSTEM_VALUE_VARYING_COORDRob Clark2018-08-143-0/+8
* freedreno/ir3: move per-generation compiler configRob Clark2018-08-143-43/+52
* radv: Update to new VK_EXT_vertex_attribute_divisor to version 2.Bas Nieuwenhuizen2018-08-142-4/+5
* radv: Allow ETC2 on RAVEN and VEGA10 instead of all GFX9.Bas Nieuwenhuizen2018-08-141-1/+2
* radv: Fix missing Android platform define.Bas Nieuwenhuizen2018-08-142-1/+3
* freedreno: move free() into fdN_context_destroy()Rob Clark2018-08-145-2/+7
* freedreno: a2xx: ir2 updateJonathan Marek2018-08-145-545/+615
* radv: Add on-demand compilation of built-in shaders.Bas Nieuwenhuizen2018-08-1413-80/+454
* radv: Refactor blit pipeline creation.Bas Nieuwenhuizen2018-08-141-350/+175
* radv: Make fs key exemplars ordered to be a reverse fs_key lookup.Bas Nieuwenhuizen2018-08-147-88/+39
* virgl: ARB_texture_barrier supportDave Airlie2018-08-146-3/+24
* mesa/glspirv: fix compilation with MSVCAlejandro Piñeiro2018-08-131-1/+1
* mesa/st/glsl_to_tgsi: fixup copy-paste mistakeErik Faye-Lund2018-08-131-1/+1
* i965/nir: Use the nir copy of shader_info to handle gl_PatchVerticesInNeil Roberts2018-08-131-1/+1
* mesa/glspirv: Set separate_shader on shader_infoNeil Roberts2018-08-131-0/+2
* mesa/glspirv: pick off the only entry point we needIago Toral Quiroga2018-08-131-0/+15
* mesa/glspirv: compute double inputs and remap attributesAlejandro Piñeiro2018-08-131-0/+19
* nir/glsl: make nir_remap_attributes publicAlejandro Piñeiro2018-08-133-17/+27
* nir/lower_samplers: don't assume a deref for both texture and sampler srcsAlejandro Piñeiro2018-08-131-53/+58
* nir/linker: take into account hidden uniformsAlejandro Piñeiro2018-08-132-1/+8
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-12 20:33:51 +0000