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* i965/blorp: Get rid of redundant num_samples blorp param.Paul Berry2013-12-095-15/+12
| | | | | | | | | | | | | | | Previously, brw_blorp_params contained two fields for determining sample count: num_samples (which determined the multisample configuration of the rendering pipeline) and dst.num_samples (which determined the multisample configuration of the render target surface). This was redundant, since both fields had to be set to the same value to avoid rendering errors. This patch eliminates num_samples to avoid future confusion. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen7+: Disentangle MSAA layout from fast clear state.Paul Berry2013-12-093-48/+47
| | | | | | | | | | | | | | | | This patch renames the enum that's used to keep track of fast clear state from "mcs_state" to "fast_clear_state", and it removes the enum value INTEL_MCS_STATE_MSAA (which previously meant, "this is an MSAA buffer, so we're not keeping track of fast clear state"). The only real purpose that enum value was serving was to prevent us from trying to do fast clear resolves on MSAA buffers, and it's just as easy to prevent that by checking the buffer's msaa_layout. This paves the way for implementing fast clears of MSAA buffers. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Don't try to use HW blitter for glCopyPixels() when multisampled.Paul Berry2013-12-091-0/+5
| | | | | | | | | The hardware blitter doesn't understand multisampled layouts, so there's no way this could possibly succeed. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Document conventions for counting layers in 2D multisample buffers.Paul Berry2013-12-094-0/+27
| | | | | | | | | | | | | | | | The "layer" parameters used in blorp, and the intel_renderbuffer::mt_layer field, represent a physical layer rather than a logical layer. This is important for 2D multisample arrays on Gen7+ because the UMS and CMS multisample layouts use N physical layers to represent each logical layer, where N is the number of samples. Also add an assertion to blorp to help catch bugs if we fail to follow these conventions. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Improve fast color clear comment.Paul Berry2013-12-091-1/+12
| | | | | | | | Clarify the fact that we only optimize full buffer clears using fast color clear, and why. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* r300/compiler/tests: Fix line length check in test parserTom Stellard2013-12-091-1/+3
| | | | | | Reviewed-by: Alex Deucher <[email protected]> CC: "9.2" "10.0" <[email protected]>
* r300/compiler/tests: Fix segfaultTom Stellard2013-12-091-6/+5
| | | | | | Reviewed-by: Alex Deucher <[email protected]> CC: "9.2" "10.0" <[email protected]>
* nouveau/video: update a few more h264 picparm field namesIlia Mirkin2013-12-091-16/+17
| | | | | | | | | | | Based on comments by Benjamin Morris <[email protected]> in http://lists.freedesktop.org/archives/nouveau/2013-December/015328.html This adds setting of is_long_term, and updates a few field names we were unclear about. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.0" <[email protected]>
* nouveau/video: update h264 picparm field names based on usageIlia Mirkin2013-12-091-15/+13
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.0" <[email protected]>
* nv50: enable h264 and mpeg4 for nv98+ (vp3, vp4.0)Ilia Mirkin2013-12-092-7/+2
| | | | | | | | | | Create the ref_bo without any storage type flags set for now. The issue probably arises from our use of the additional buffer space at the end of the ref_bo. It should probably be split up in the future. Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Martin Peres <[email protected]> Cc: "10.0" <[email protected]>
* nvc0: make sure nvd7 gets NVC8_3D_CLASS as wellIlia Mirkin2013-12-091-1/+2
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv50: TXF already has integer arguments, don't try to convert from f32Ilia Mirkin2013-12-091-7/+9
| | | | | | Fixes the texelFetch piglit tests Signed-off-by: Ilia Mirkin <[email protected]>
* llvmpipe: clamp fragment shader depth write to the current viewport depth range.Matthew McClure2013-12-0913-29/+255
| | | | | | | | | | | | | | | | | With this patch, generate_fs_loop will clamp any fragment shader depth writes to the viewport's min and max depth values. Viewport selection is determined by the geometry shader output for the viewport array index. If no index is specified, then the default viewport index is zero. Semantics for this path can be found in draw_clamp_viewport_idx and lp_clamp_viewport_idx. lp_jit_viewport was created to store viewport information visible to JIT code, and is validated when the LP_NEW_VIEWPORT dirty flag is set. lp_rast_shader_inputs is responsible for passing the viewport_index through the rasterizer stage to fragment stage (via lp_jit_thread_data). Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* wayland: Add support for eglSwapIntervalNeil Roberts2013-12-073-40/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Wayland EGL platform now respects the eglSwapInterval value. The value is clamped to either 0 or 1 because it is difficult (and probably not useful) to sync to more than 1 redraw. The main change is that if the swap interval is 0 then Mesa won't install a frame callback so that eglSwapBuffers can be executed as often as necessary. Instead it will do a sync request after the swap buffers. It will block for sync complete event in get_back_bo instead of the frame callback. The compositor is likely to send a release event while processing the new buffer attach and this makes sure we will receive that before deciding whether to allocate a new buffer. If there are no buffers available then instead of returning with an error, get_back_bo will now poll the compositor by repeatedly sending sync requests every 10ms. This is a last resort and in theory this shouldn't happen because there should be no reason for the compositor to hold on to more than three buffers. That means whenever we attach the fourth buffer we should always get an immediate release event which should come in with the notification for the first sync request that we are throttled to. When the compositor is directly scanning out from the application's buffer it may end up holding on to three buffers. These are the one that is is currently scanning out from, one that has been given to DRM as the next buffer to flip to, and one that has been attached and will be given to DRM as soon as the previous flip completes. When we attach a fourth buffer to the compositor it should replace that third buffer so we should get a release event immediately after that. This patch therefore also changes the number of buffer slots to 4 so that we can accomodate that situation. If DRM eventually gets a way to cancel a pending page flip then the compositors can be changed to only need to hold on to two buffers and this value can be put back to 3. This also moves the vblank configuration defines from platform_x11.c to the common egl_dri2.h header so they can be shared by both platforms.
* wayland: Block for the frame callback in get_back_bo not dri2_swap_buffersNeil Roberts2013-12-071-14/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Consider a typical game-style main loop which might be like this: while (1) { draw_something(); eglSwapBuffers(); } In this case the game is relying on eglSwapBuffers to throttle to a sensible frame rate. Previously this game would end up using three buffers even though it should only need two. This is because Mesa decides whether to allocate a new buffer in get_back_bo which would be before it has tried to read any events from the compositor so it wouldn't have seen any buffer release events yet. This patch just moves the block for the frame callback to get_back_bo. Typically the compositor will send a release event immediately after one of the attaches so if we block for the frame callback here then we can be sure to have completed at least one roundtrip and received that release event after attaching the previous buffer before deciding whether to allocate a new one. dri2_swap_buffers always calls get_back_bo so even if the client doesn't render anything we will still be sure to block to the frame callback. The code to create the new frame callback has been moved to after this call so that we can be sure to have cleared the previous frame callback before requesting a new one.
* glapi: Do not include dlfcn.h on Windows.Vinson Lee2013-12-071-0/+2
| | | | | | | | | | This patch fixes this MinGW build error. CC glapi_gentable.lo glapi_gentable.c:47:19: fatal error: dlfcn.h: No such file or directory Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* r600/llvm: Allow arbitrary amount of temps in tgsi to llvmVincent Lejeune2013-12-072-4/+45
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* freedreno/a3xx: add adreno 330 supportRob Clark2013-12-072-4/+7
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: add ROUNDRob Clark2013-12-071-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* mesa: Require per-sample shading if the `sample` qualifier is used.Chris Forbes2013-12-071-0/+8
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* glsl: Populate gl_fragment_program::IsSample bitfieldChris Forbes2013-12-071-1/+4
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* mesa: add IsSample bitfield to gl_fragment_programChris Forbes2013-12-071-0/+6
| | | | | | | | Drivers will need to look at this to decide if they need to do per-sample fragment shader dispatch. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* glsl: Put `sample`-qualified varyings in their own packing classesChris Forbes2013-12-071-1/+1
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* glsl: Add ir support for `sample` qualifier; adjust compiler and linkerChris Forbes2013-12-0713-4/+60
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* glsl: Add frontend support for `sample` auxiliary storage qualifierChris Forbes2013-12-075-4/+13
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: Don't flag gather quirks for Gen8+Chris Forbes2013-12-071-1/+1
| | | | | | | | | | | My understanding is that Broadwell retains the same SCS mechanism that Haswell has, so even if the underlying issue with this format is not fixed, the w/a will be applied in SCS rather than needing shader code. Signed-off-by: Chris Forbes <[email protected]> Cc: Kenneth Graunke <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/Gen7: Allow CMS layout for multisample texturesChris Forbes2013-12-071-17/+1
| | | | | | | | | Now that all the pieces are in place, this should provide a nice performance boost for apps using multisample textures. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vs: Sample from MCS surface when requiredChris Forbes2013-12-072-7/+40
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/fs: Sample from MCS surface when requiredChris Forbes2013-12-073-10/+41
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Add shader opcode for sampling MCS surfaceChris Forbes2013-12-076-0/+16
| | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/Gen7: Include bitfield in the sampler key for CMS layoutChris Forbes2013-12-072-0/+18
| | | | | | | | | | | | | | | | | | | | We need to emit extra shader code in this case to sample the MCS surface first; we can't just blindly do this all the time since IVB will sometimes try to access the MCS surface even if disabled. V3: Use actual MSAA layout from the texture's mt, rather then computing what would have been used based on the format. This is simpler and less fragile - there's at least one case where we might want to have a texture's MSAA layout change based on what the app does (CMS SINT falling back to UMS if the app ever attempts to render to it with a channel disabled.) This also obsoletes V2's 1/10 -- compute_msaa_layout can now remain an implementation detail of the miptree code. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965/Gen7: Move decision to allocate MCS surface into intel_mipmap_createChris Forbes2013-12-071-6/+8
| | | | | | | | | | This gives us correct behavior for both renderbuffers (which previously worked) and multisample textures (which would never get an MCS surface allocated, even if CMS layout was selected) Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/Gen7: emit mcs info for multisample texturesChris Forbes2013-12-071-0/+5
| | | | | | | | Previously this was only done for render targets. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/wm: Set copy of sample mask in 3DSTATE_PS correctly for HaswellChris Forbes2013-12-071-2/+7
| | | | | | | | | | | | | | | The bspec says: "SW must program the sample mask value in this field so that it matches with 3DSTATE_SAMPLE_MASK" I haven't observed this to actually fix anything, but stumbled across it while adding the rest of the support for CMS layout for multisample textures. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: refactor sample mask calculationChris Forbes2013-12-074-33/+41
| | | | | | | | | Haswell needs a copy of the sample mask in 3DSTATE_PS; this makes that convenient. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: Don't emit empty declaration warning for a struct specifierIan Romanick2013-12-061-1/+1
| | | | | | | | | | | | | | | | | The intention is that things like int; will generate a warning. However, we were also accidentally emitting the same warning for things like struct Foo { int x; }; Signed-off-by: Ian Romanick <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68838 Reviewed-by: Kenneth Graunke <[email protected]> Cc: Aras Pranckevicius <[email protected]> Cc: "9.2 10.0" <[email protected]>
* st/xa: Bump major version number to 2Thomas Hellstrom2013-12-061-1/+1
| | | | | | | For some reason this was left out when the version was changed... Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* nvc0: fixup gk110 and up not being listed in various switch statementsBen Skeggs2013-12-067-13/+27
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* i965: Replace non-standard INLINE macro with "inline".Kenneth Graunke2013-12-056-22/+22
| | | | | | These are identical: main/compiler.h defines INLINE to "inline". Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Don't use GL types in files shared with intel-gpu-tools.Kenneth Graunke2013-12-056-1035/+1035
| | | | | | | | | sed -i -e 's/GLuint/unsigned/g' -e 's/GLint/int/g' \ -e 's/GLfloat/float/g' -e 's/GLubyte/uint8_t/g' \ -e 's/GLshort/int16_t/g' \ brw_eu* brw_disasm.c brw_structs.h Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Drop trailing whitespace from the rest of the driver.Kenneth Graunke2013-12-0572-621/+621
| | | | | | | Performed via: $ for file in *; do sed -i 's/ *//g'; done Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Drop trailing whitespace from files shared with intel-gpu-tools.Kenneth Graunke2013-12-055-276/+276
| | | | | | Performed via s/ *$//g. Signed-off-by: Kenneth Graunke <[email protected]>
* tools/trace: More tweaks to state dumping.José Fonseca2013-12-051-3/+12
| | | | | | - Ignore buffer format (it is totally arbitrary) - Initialize state. - Handle begin/end_query statements.
* trace: Reorder dumping of pipe_rasterizer_state.José Fonseca2013-12-051-3/+11
| | | | | | | Such that it matches the pipe_rasterizer_state declaration, making it easier to double-check that all state is being actually dumped. Trivial.
* trace: Dump pipe_sampler_state::seamless_cube_map.José Fonseca2013-12-051-0/+1
| | | | Trivial.
* radeonsi: Remove some stale XXX / FIXME commentsMichel Dänzer2013-12-052-5/+1
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* i965: Emit better code for ir_unop_sign.Matt Turner2013-12-042-15/+49
| | | | | | | | | total instructions in shared programs: 1550449 -> 1550048 (-0.03%) instructions in affected programs: 15207 -> 14806 (-2.64%) Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: New peephole optimization to flatten IF/BREAK/ENDIF.Matt Turner2013-12-044-0/+99
| | | | | | | total instructions in shared programs: 1550713 -> 1550449 (-0.02%) instructions in affected programs: 7931 -> 7667 (-3.33%) Reviewed-by: Paul Berry <[email protected]>
* i965/fs: Emit a MOV instead of a SEL if the sources are the same.Matt Turner2013-12-041-19/+23
| | | | | | | | One program affected. instructions in affected programs: 436 -> 428 (-1.83%) Reviewed-by: Paul Berry <[email protected]>
* i965/fs: Extend SEL peephole to handle only matching MOVs.Matt Turner2013-12-041-3/+2
| | | | | | | | | | | | | | | | | | | | | | Before this patch, the following code would not be optimized even though the first two instructions were common to the then and else blocks: (+f0) IF MOV dst0 ... MOV dst1 ... MOV dst2 ... ELSE MOV dst0 ... MOV dst1 ... MOV dst3 ... ENDIF This commit extends the peephole to handle this case. No shader-db changes. Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
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