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* nir: Remove always-true assertKristian H. Kristensen2020-02-041-1/+0
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
* glsl: Use 'using' to be explicit about visitor overloadsKristian H. Kristensen2020-02-044-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Clang has a warning about overloading virtuals that triggers when a derived class defines a virtual function that's an overload of function in the base class. This kind of thing: struct chart; // let's pretend this exists struct Base { virtual void* get(char* e); }; struct Derived: public Base { virtual void* get(chart* e); // typo, we wanted to override the same function }; The solution is to use using Base::get; to be explicit about the intention to reuse the base class virtual. We hit this a lot with out glsl ir_hierarchical_visitor visitor pattern, so let's adds some 'using' to calm down the compiler. See-also: https://stackoverflow.com/questions/18515183/c-overloaded-virtual-function-warning-by-clang) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
* spirv/opencl: Cast opcode up front to avoid warningsKristian H. Kristensen2020-02-041-8/+10
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
* freedreno/fdperf: Cast away some ignored return valuesKristian H. Kristensen2020-02-041-4/+4
| | | | | | This is developer tool, it can crash and burn if it fails to allocate. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
* nir: Make unroll pragma work on clangKristian H. Kristensen2020-02-041-9/+18
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
* nir: Delete unused is_var_constant() helperKristian H. Kristensen2020-02-041-6/+0
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3686>
* clover: Use explicit conversion from llvm::StringRef to std::stringJan Vesely2020-02-032-2/+3
| | | | | | | | | Fixes build after llvm 777180a32b61070a10dd330b4f038bf24e916af1 ("[ADT] Make StringRef's std::string conversion operator explicit") CC: <[email protected]> Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* zink: disallow depth-stencil blits with format-changeErik Faye-Lund2020-02-031-0/+4
| | | | | | | | | | | | | The Vulkan spec says this about vkCmdBlitImage: "No format conversion is supported between depth/stencil images. The formats must match." So yeah, let's stop trying to do this. Reviewed-by: Dave Airlie <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3681> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3681>
* zink: be more careful about the mask-checkErik Faye-Lund2020-02-031-2/+4
| | | | | | | | We currently disallow blits that we can support. Let's be more accurate when checking the mask. Reviewed-by: Dave Airlie <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3681>
* panfrost: Fix the damage box clamping logicBoris Brezillon2020-02-031-0/+2
| | | | | | | | | | | | When the rendering are is not covering the whole FBO, and the biggest damage rect is empty, we can have damage.max{x,y} > damage.min{x,y}, which leads to invalid reload boxes. Fixes: 65ae86b85422 ("panfrost: Add support for KHR_partial_update()") Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
* pan/midgard: Stop leaking instruction objects in mir_schedule_alu()Boris Brezillon2020-02-031-18/+16
| | | | | | | | Allocate those instructions with ralloc() instead of using mem_dup. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
* pan/midgard: Don't check 'branch && branch->writeout' twice in ↵Boris Brezillon2020-02-031-1/+1
| | | | | | | | | | | mir_schedule_alu() There's a writeout bool storing the result of this test. Use it instead of duplicating the test. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
* pan/midgard: Lower bitfield extract to shiftsBoris Brezillon2020-02-031-0/+1
| | | | | | | | | Let's lower bitfield extract to shifts until we figure out if it can be natively supported. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
* pan/midgard: Make sure we pass the right RT id to emit_fragment_store()Boris Brezillon2020-02-031-1/+26
| | | | | | | | | | | | | | | | | nir_intrinsic_base() is assigned nir_variable.data.driver_location, which is assigned a unique ID based on the variable position in the shader variable list. There's no guarantee that this position will match the RT id we want to pass to emit_fragment_store(). Add a search_var() helper to retrieve a nir_variable based on its driver location, so we can pass the right RT value to emit_fragment_store(). We also make sure the shader output is color, since emit_fragment_store() is not ready for depth/stencil stores yet. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
* pan/midgard: Add an enum to describe the render targetsBoris Brezillon2020-02-031-1/+9
| | | | | | | | | We are about to add a special ZS render target, let's add a enum so we can easily know which render target we're dealing with. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
* util/os_socket: Include unistd.h to fix build errorBernd Kuhls2020-02-031-0/+1
| | | | | | | | | | | | | | | Fixes In file included from ../src/util/os_socket.c:8: ../src/util/os_socket.h:26:1: error: unknown type name ‘ssize_t’; did you mean ‘size_t’? ssize_t os_socket_recv(int socket, void *buffer, size_t length, int flags); seen with gcc version 8.3.0 (Buildroot 2019.11) and uClibc 1.0.32. Reviewed-by: Eric Engestrom <[email protected]> Fixes: ef5266ebd50e7fa65c56 ("util/os_socket: Add socket related functions.") Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3659> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3659>
* nv50: report max lod bias of 15.0Ilia Mirkin2020-02-021-1/+1
| | | | | | | | | | | The blob returns 15, the state creation code clamps it to 15, but since the dawn of time we've returned 4.0. Setting this to 15 also fixes GTF-GL33.gtf21.GL3Tests.texture_lod_bias.texture_lod_bias_clamp_m_le_M which is sensitive to these limits. Signed-off-by: Ilia Mirkin <[email protected]>
* egl: put full path to libEGL_mesa.so in GLVND jsonEric Engestrom2020-02-023-8/+36
| | | | | | | | | | | This is useful when installing to a non-standard path. glvnd_icd.py copied & adapted from src/intel/vulkan/anv_icd.py Signed-off-by: Eric Engestrom <[email protected]> Acked-by: Matt Turner <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3038> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3038>
* radv: Allow non-dedicated linear images and buffer.Bas Nieuwenhuizen2020-02-022-6/+13
| | | | | | | | | | | | | Requested for virtualized Vulkan as they need to export memory to map it. Since radeonsi and the kernel assume an image without metadata is linear, this should work just fine. Reviewed-by: Chia-I Wu <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3583> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3583>
* pan/midgard: Implement mixed-type constant packingAlyssa Rosenzweig2020-02-021-52/+47
| | | | | | | | | | Lot of churn but mostly just specializes types per source instead of per instruction. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653>
* pan/midgard: Break out one-src read_componentsAlyssa Rosenzweig2020-02-022-23/+31
| | | | | | | | For constant packing, this is interesting to break down further. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653>
* panfrost: Fix non-debug buildsIcecream952020-02-021-0/+1
| | | | | | | | | | | | | For non-debug builds, where assertions are compiled out, GCC complains about the end of the non-void function panfrost_translate_channel_width being reached. Fixes: 226c1efe9a8 ("panfrost: Add more info to some assertions") Reported-by: Piotr Oniszczuk Suggested-by: Boris Brezillon <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3665> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3665>
* anv/blorp: Use the correct size for vkCmdCopyBufferToImageJason Ekstrand2020-02-021-0/+8
| | | | | | | | | | | | | Now that we're using an uncompressed format for the buffer, we have to scale down the dimensions we pass into BLORP when doing buffer->image copies. Fixes: dd92179a72 "anv: Canonicalize buffer formats for image/buffer..." Closes: #2452 Reviewed-by: Erik Faye-Lund <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3664> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3664>
* lima: Fix build with GCC 10.Vinson Lee2020-01-311-1/+1
| | | | | | | | | | | | | | | | This patch fixes this build error with GCC 10. /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_context.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_resource.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_draw.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_bo.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_submit.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_util.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here /usr/bin/ld: src/gallium/drivers/lima/liblima.a(lima_texture.c.o):src/gallium/drivers/lima/lima_util.h:32: multiple definition of `lima_dump_command_stream'; src/gallium/drivers/lima/liblima.a(lima_screen.c.o):src/gallium/drivers/lima/lima_util.h:32: first defined here Fixes: d71cd245d744 ("lima: Rotate dump files after each finished pp frame") Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* freedreno/ir3: fix a dirty lieRob Clark2020-02-011-7/+4
| | | | | | | | | | | Lies, damn lies, and leftover hacks! We no longer hard-code these two, so fix the disasm to print the correct values. Signed-off-by: Rob Clark <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: simplify split from collectRob Clark2020-02-011-0/+10
| | | | | | | | | | | In some cases we need to split components out from what was already a collect. That was making it hard to DCE unused components of the collect. (Ie. unused components of fragcoord, etc) So just detect this case and skip the chained collect+split. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: create fragcoord instructions in input blockRob Clark2020-02-011-2/+2
| | | | | | | | | | | | | This was somehow working to create the instructions in a random block, and use the value in other blocks, by dumb luck. But two-pass-RA's better choice of register assignment causes a couple dEQPs to start failing without this fix: dEQP-GLES3.functional.shaders.metamorphic.bubblesort_flag.variant_1 dEQP-GLES3.functional.shaders.metamorphic.bubblesort_flag.variant_2 Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: remove unused tex arg harderRob Clark2020-02-013-19/+12
| | | | | | | | Just killing the SSA link isn't enough. It confuses RA, legalize, and postsched to see a bogus unused reg. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: add RA sanity checkRob Clark2020-02-011-0/+33
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/a6xx: fix lrz overflowRob Clark2020-02-011-8/+3
| | | | | | | | | | Running the complete deqp_gles2 seems to trigger an overflow in lrz cmdstream. We skip the blit clear fast-path if there have been any draws (so mid-batch clears of any attached buffer hit the 3d pipe). Which means it is safe to simply discard any lrz clear rendering. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: two pass register allocationRob Clark2020-02-012-60/+297
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: don't precolor unused inputsRob Clark2020-02-011-1/+2
| | | | | | | | This apparently can happen with gs/tess. And will cause problems with two-pass-ra, so lets just skip them. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: add is_tex_or_prefetch()Rob Clark2020-02-013-2/+7
| | | | | | | | | | | | Some of the aspects of tex prefetch are in common with normal tex instructions, such as having a wrmask to control which components are written. Add a helper for this. This should result in actually using the prefetch wrmask to avoid fetching unneeded components. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: number instructions from oneRob Clark2020-02-011-1/+1
| | | | | | | | ra_block_compute_live_ranges() treats zero as "not yet defined", so probably best to not let this be a valid instruction # Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: post-RA sched passRob Clark2020-02-016-5/+679
| | | | | | | | | | | | | After RA, we can schedule to increase parallelism (reduce nop's) without worrying about increasing register pressure. This pass lets us cut down the instruction count ~10%, and prioritize bary.f, kill, etc, which would tend to increase register pressure if we tried to do that before RA. It should be more useful if RA round-robin'd register choices. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: fix kill schedulingRob Clark2020-02-012-1/+2
| | | | | | | | | | | | | | kill (and other cat0/flow instructions) do not have a dst register. Which was mostly harmless before, other than RA thinking it would need a free register to write. (But nothing consumed it, so the value would be immediately dead.) But this would cause more problems with postsched which would see a bogus dependency. Also, post-RA sched *does* need to see the dependency on the predicate register. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3/ra: make use()/def() functions instead of macrosRob Clark2020-02-011-15/+24
| | | | | | | | | | | | | Originally these were nested functions, which worked nicely, giving us the function of a local macro that was actual 'c' syntax (ie. not token pasted macro). But these were converted to macros because clang doesn't let us have nice gcc extensions. Extract these back out into functions, before adding more things and making the macros even more cumbersome. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: a bit more optmsgs debugRob Clark2020-02-011-0/+10
| | | | | | | Also dump where arrays are allocated. This was useful for debugging. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: move atomic fixup after RARob Clark2020-02-013-28/+38
| | | | | | | | A post-RA sched pass will move the extra mov's to the wrong place, so rework the fixup so it can run after RA (and therefore after postsched) Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: move block-scheduling into legalizeRob Clark2020-02-014-49/+45
| | | | | | | | | We want to do this only once. If we have post-RA sched pass, then we don't want to do it pre-RA. Since legalize is where we resolve the branch/jumps, we might as well move this into legalize. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: move nop padding to legalizeRob Clark2020-02-015-85/+74
| | | | | | | | | | | This way we can deal with it in one place, *after* all the blocks have been scheduled. Which will simplify life for a post-RA sched pass. This has the benefit of already taking into account nop's that legalize has to insert for non-delay related reasons. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: split out delay helpersRob Clark2020-02-015-183/+350
| | | | | | | | We're going to want these also for a post-RA sched pass. And also to split nop stuffing out into it's own pass. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: fix crash when no non-input instructionsRob Clark2020-02-011-1/+1
| | | | | | | | This scenario can come up with block-sched and nop-sched moved to after RA. So lets fix it first to keep things bisectable. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: cleanup after lower_locals_to_regsRob Clark2020-02-011-8/+17
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* freedreno/ir3: shuffle a few ir3_register fieldsRob Clark2020-02-011-14/+16
| | | | | | | It makes life easier for postsched to always be able to rely on wrmask. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
* intel/gen12+: Set way_size_per_bank to 4Anuj Phogat2020-01-311-1/+1
| | | | | | | | This patch fixes the way_size_per_bank for Gen12+ Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Sagar Ghuge<[email protected]>
* intel/gen12+: Reserve 4KB of URB space per bank for Compute EngineAnuj Phogat2020-01-311-1/+19
| | | | | | | | | | | | This patch is required to fix 11K+ vulkan CTS failures we were getting with way_size_per_bank of 4 (see next patch). Thanks to Sagar Ghuge and Jordan Justen for all the hard work of debugging and testing. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Sagar Ghuge<[email protected]>
* virgl: Use align_free for align_malloc allocated bufferSzymon Andrzejuk2020-02-011-1/+1
| | | | | Signed-off-by: Szymon Andrzejuk <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* freedreno/drm: readonly cmdstreamRob Clark2020-01-314-16/+11
| | | | | | | | | | Noticed that we weren't consistently making cmdstream buffers gpu-readonly. Fix that and drop the need to pass flags to fd_bo_new_ring(). Signed-off-by: Rob Clark <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3663> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3663>
* intel/fs: Write the address register with NoMask for MOV_INDIRECTJason Ekstrand2020-01-311-0/+9
| | | | | | | | | | | This fixes a hang in the following Vulkan CTS test on TGL-LP: dEQP-VK.descriptor_indexing.storage_buffer_dynamic_in_loop Cc: [email protected] Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
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