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authorRob Clark <[email protected]>2020-01-18 11:03:38 -0800
committerMarge Bot <[email protected]>2020-02-01 02:40:22 +0000
commitad2587d3c8885ce4aa0403269268a1c0ab8c2cac (patch)
treedc95945974ec6cbdd69d49e43d610311f0d3c696 /src
parent4a7a6c9ef0eb6b26d8410591353142207689d085 (diff)
freedreno/ir3: add is_tex_or_prefetch()
Some of the aspects of tex prefetch are in common with normal tex instructions, such as having a wrmask to control which components are written. Add a helper for this. This should result in actually using the prefetch wrmask to avoid fetching unneeded components. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
Diffstat (limited to 'src')
-rw-r--r--src/freedreno/ir3/ir3.h5
-rw-r--r--src/freedreno/ir3/ir3_depth.c2
-rw-r--r--src/freedreno/ir3/ir3_legalize.c2
3 files changed, 7 insertions, 2 deletions
diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h
index f78a7d6f364..f1c15ca2519 100644
--- a/src/freedreno/ir3/ir3.h
+++ b/src/freedreno/ir3/ir3.h
@@ -710,6 +710,11 @@ static inline bool is_tex(struct ir3_instruction *instr)
return (opc_cat(instr->opc) == 5);
}
+static inline bool is_tex_or_prefetch(struct ir3_instruction *instr)
+{
+ return is_tex(instr) || (instr->opc == OPC_META_TEX_PREFETCH);
+}
+
static inline bool is_mem(struct ir3_instruction *instr)
{
return (opc_cat(instr->opc) == 6);
diff --git a/src/freedreno/ir3/ir3_depth.c b/src/freedreno/ir3/ir3_depth.c
index 59ea3af407b..135d4365d2e 100644
--- a/src/freedreno/ir3/ir3_depth.c
+++ b/src/freedreno/ir3/ir3_depth.c
@@ -114,7 +114,7 @@ remove_unused_by_block(struct ir3_block *block)
/* tex (cat5) instructions have a writemask, so we can
* mask off unused components. Other instructions do not.
*/
- if (is_tex(src) && (src->regs[0]->wrmask > 1)) {
+ if (is_tex_or_prefetch(src) && (src->regs[0]->wrmask > 1)) {
src->regs[0]->wrmask &= ~(1 << instr->split.off);
/* prune no-longer needed right-neighbors. We could
diff --git a/src/freedreno/ir3/ir3_legalize.c b/src/freedreno/ir3/ir3_legalize.c
index 458629021a4..9c349bf2745 100644
--- a/src/freedreno/ir3/ir3_legalize.c
+++ b/src/freedreno/ir3/ir3_legalize.c
@@ -236,7 +236,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
if (is_sfu(n))
regmask_set(&state->needs_ss, n->regs[0]);
- if (is_tex(n) || (n->opc == OPC_META_TEX_PREFETCH)) {
+ if (is_tex_or_prefetch(n)) {
regmask_set(&state->needs_sy, n->regs[0]);
ctx->so->need_pixlod = true;
if (n->opc == OPC_META_TEX_PREFETCH)