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* glsl: stop adding pointers from gl_shader_variable to the cacheTimothy Arceri2017-08-241-12/+28
* glsl: allow NULL to be passed to encode_type_to_blob()Timothy Arceri2017-08-241-0/+10
* radv/gfx9: don't expose linear depth on vega.Dave Airlie2017-08-241-0/+4
* radv: don't degrade tiling mode for small compressed or depth texture.Dave Airlie2017-08-241-6/+10
* radv/gfx9: only minify image view width/height/depth before gfx9.Dave Airlie2017-08-242-7/+15
* radv/image: don't rescale width/height if the format isn't changingDave Airlie2017-08-241-4/+6
* radv: cleanup some image view descriptor setup.Dave Airlie2017-08-242-13/+21
* radv/gfx9: emit sx_mrt_blend registersDave Airlie2017-08-243-3/+134
* radv: bump space check for indexed draw.Dave Airlie2017-08-241-1/+1
* radv/gfx9: fixup db/stencil disable.Dave Airlie2017-08-241-3/+7
* radv/gfx9: fix level count in color register setup.Dave Airlie2017-08-241-1/+1
* radv/gfx9: use total levels in texture descriptorDave Airlie2017-08-241-1/+1
* radv: Implement bc optimize.Bas Nieuwenhuizen2017-08-243-0/+33
* ac/nir: refactor input variable iteration.Bas Nieuwenhuizen2017-08-241-19/+11
* i965: Stop using wm_prog_data->binding_table.render_target_start.Kenneth Graunke2017-08-232-9/+10
* i965: Add a brw_wm_prog_data::has_render_target_reads field.Kenneth Graunke2017-08-233-4/+5
* i965: Inline brw_update_renderbuffer_surfaces().Kenneth Graunke2017-08-232-38/+20
* i965: Pass fb into emit_null_surface instead of dimensions.Kenneth Graunke2017-08-231-16/+12
* i965: Devirtualize update_renderbuffer_surface.Kenneth Graunke2017-08-234-30/+5
* i965: Delete update_renderbuffer_surface flags.Kenneth Graunke2017-08-232-21/+5
* i965: Make brw_update_renderbuffer_surface static.Kenneth Graunke2017-08-232-11/+6
* i965: Drop BRW_NEW_BLORP from SURFACE_STATE setup code.Kenneth Graunke2017-08-235-29/+1
* i965: Make a BRW_NEW_FAST_CLEAR_COLOR dirty bit.Kenneth Graunke2017-08-238-5/+25
* i965: Drop Gen7+ nonsense from brw_ff_gs.c.Kenneth Graunke2017-08-231-4/+3
* i965: Only set key->flat_shade if COL0/COL1 are written.Kenneth Graunke2017-08-231-1/+3
* i965: Clean up brwNewProgram().Kenneth Graunke2017-08-231-28/+5
* st/va: exclude the buffer reallocation for encode caseLeo Liu2017-08-231-1/+1
* swr: limit pipe_draw_info->restart_index usageTim Rowley2017-08-231-1/+4
* radeonsi: fix wrong assertion in si_init_bindless_descriptors()Samuel Pitoiset2017-08-231-1/+1
* radeon/video: Return false explicitly for HEVC if not the caseLeo Liu2017-08-231-0/+1
* gallium/docs: Fix the math formula of U2I64Gwan-gyeong Mun2017-08-231-2/+2
* gallium/docs: Add missing word "Not"Gwan-gyeong Mun2017-08-231-1/+1
* tgsi: store opcode mnemonics in a separate tableNicolai Hähnle2017-08-232-6/+16
* gallium: use tgsi_get_opcode_name instead of tgsi_opcode_info::mnemonicNicolai Hähnle2017-08-235-7/+10
* tgsi: macro-ify the opcodes tableNicolai Hähnle2017-08-233-251/+263
* tgsi: remove post_indent from some 64-bit opcodesNicolai Hähnle2017-08-231-6/+6
* tgsi: reduce tgsi_opcode_info::pre_dedent and post_indent to 1 bitNicolai Hähnle2017-08-231-2/+2
* gallium/radeon: fix saving multi-part command streamsNicolai Hähnle2017-08-231-1/+1
* ac/debug: invoke valgrind checks while parsing IBsNicolai Hähnle2017-08-231-0/+20
* ac/debug: annotate IB dumps with the raw valuesNicolai Hähnle2017-08-231-18/+66
* ac/debug: use an explicit getter for fetching words from the IBNicolai Hähnle2017-08-231-153/+215
* radeonsi: update comment describing indices into sctx->descriptorsNicolai Hähnle2017-08-231-6/+5
* util: fix valgrind errors when dumping pipe_draw_infoNicolai Hähnle2017-08-231-3/+9
* radeonsi: do not assert when reserving bindless slot 0Samuel Pitoiset2017-08-231-1/+4
* radeonsi: rename some bindless-related helper functionsSamuel Pitoiset2017-08-231-21/+21
* radeonsi: minor cleanups in si_make_{texture,image}_handle_resident()Samuel Pitoiset2017-08-231-12/+12
* Android: gallium_dri: pass dri.sym to linkerRob Herring2017-08-221-0/+7
* st/va: enable P016 format i.e. reallocate buffer if format changedLeo Liu2017-08-221-0/+12
* radeon/vcn: enable P016 mode supportLeo Liu2017-08-221-7/+11
* radeon/vcn: correct target buffer pitch calculationLeo Liu2017-08-221-1/+1
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