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* vulkan: Bump headers to 1.1.117Lionel Landwerlin2019-07-291-21/+145
* intel/mi: only resolve to a temp register if source isn't in memoryEric Engestrom2019-07-291-1/+1
* nir: Fix helgrind complaints about data race in trivial_swizzle init.Eric Anholt2019-07-291-3/+3
* freedreno: Fix data race on making the shader's id.Eric Anholt2019-07-291-1/+2
* freedreno: Take a lock around shader variant creation.Eric Anholt2019-07-292-0/+7
* freedreno: Fix data races with allocating/freeing struct ir3.Eric Anholt2019-07-291-1/+1
* freedreno: Fix helgrind complaint on shader-db key setup.Eric Anholt2019-07-291-2/+1
* radv: Take variable descriptor counts into account for buffer entries.Bas Nieuwenhuizen2019-07-291-1/+10
* anv: Don't claim support for 24 and 48-bit formats on IVBJason Ekstrand2019-07-291-0/+8
* isl/formats: R8G8B8_UNORM_SRGB isn't supported on HSWJason Ekstrand2019-07-291-1/+5
* pan/midgard: Fix alpha test w.r.t new indexingAlyssa Rosenzweig2019-07-291-1/+2
* softpipe: Don't draw when rasterizer_discard is setGert Wollny2019-07-291-0/+3
* softpipe: Fix cube arrays layer selectionGert Wollny2019-07-291-8/+8
* vulkan/wsi/wayland: implement acquire timeoutLionel Landwerlin2019-07-291-25/+51
* util: add a timespec helperLionel Landwerlin2019-07-295-0/+673
* intel: replace large stack buffer with heap allocationEric Engestrom2019-07-293-31/+37
* radv/gfx10: do not use the fast depth or stencil clear bytes pathSamuel Pitoiset2019-07-291-2/+3
* ac: do not crash when the buffer data format is invalidSamuel Pitoiset2019-07-291-0/+1
* ac/nir: fix txf_ms with an offsetRhys Perry2019-07-291-2/+2
* radv: Delete unused local variables in optimization loopConnor Abbott2019-07-291-0/+2
* nir/find_array_copies: Handle wildcards and overlapping copiesConnor Abbott2019-07-293-185/+405
* nir: Print array deref indices as decimalConnor Abbott2019-07-291-1/+1
* lima/gpir/sched: Handle more special ops in can_use_complex()Connor Abbott2019-07-281-5/+24
* lima/gp: Clean up lima_program_optimize_vs_nir() a littleConnor Abbott2019-07-281-1/+1
* lima/gpir/sched: Don't try to spill when something else has succeededConnor Abbott2019-07-281-7/+4
* nv50/ir: don't consider the main compute function as taking argumentsIlia Mirkin2019-07-271-1/+1
* nv50/ir: handle insn not being there for definition of CVT argIlia Mirkin2019-07-271-2/+3
* nouveau: flip DEBUG -> !NDEBUGIlia Mirkin2019-07-2710-49/+15
* nvc0: allow a non-user buffer to be bound at position 0Ilia Mirkin2019-07-271-18/+27
* nv50,nvc0: update sampler/view bind functions to accept NULL arrayIlia Mirkin2019-07-272-14/+18
* gallium/vl: fix compute tgsi shaders to not process undefined componentsIlia Mirkin2019-07-271-52/+52
* pan/midgard: Introduce invert fieldAlyssa Rosenzweig2019-07-265-11/+90
* pan/midgard: Tag SSA/regAlyssa Rosenzweig2019-07-267-18/+28
* radeon/vcn: enable rate control for hevc encodingBoyuan Zhang2019-07-261-1/+7
* radeon/uvd: enable rate control for hevc encodingBoyuan Zhang2019-07-261-1/+7
* radeon/vcn: fix poc for hevc encodeBoyuan Zhang2019-07-262-2/+3
* radeon/uvd: fix poc for hevc encodeBoyuan Zhang2019-07-262-3/+3
* nir: Optimize umod loweringSagar Ghuge2019-07-261-25/+23
* pan/midgard: Improve schedulingAlyssa Rosenzweig2019-07-262-5/+9
* pan/midgard: Specialize mod checking by type when checking constantsAlyssa Rosenzweig2019-07-263-7/+13
* pan/midgard: Use more aggressive writeout criteriaAlyssa Rosenzweig2019-07-261-4/+14
* pan/midgard: Pipeline non-SSA registersAlyssa Rosenzweig2019-07-261-6/+28
* pan/midgard: Add mir_mask_of_read_components helperAlyssa Rosenzweig2019-07-262-0/+41
* pan/midgard: Add mir_is_written_before helperAlyssa Rosenzweig2019-07-262-0/+20
* pan/midgard: Obey fragment writeout criteriaAlyssa Rosenzweig2019-07-261-8/+70
* pan/midgard: Add post-RA move eliminationAlyssa Rosenzweig2019-07-263-0/+56
* pan/midgard: Share mir_nontrivial_outmodAlyssa Rosenzweig2019-07-263-16/+17
* pan/midgard: Implement texture RAAlyssa Rosenzweig2019-07-265-143/+271
* pan/midgard: Fix backwards blend color loadAlyssa Rosenzweig2019-07-261-1/+1
* pan/midgard: Fix scheduling mishapAlyssa Rosenzweig2019-07-261-1/+1
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