Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Move compiler.h and imports.h/c from src/mesa/main into src/util | Marek Olšák | 2020-03-27 | 2 | -2/+2 |
* | panfrost: Extend the tiled store fast-path to loads | Icecream95 | 2020-03-26 | 1 | -28/+47 |
* | pan/bi: Rewrite aligned vectors as well | Alyssa Rosenzweig | 2020-03-24 | 1 | -15/+62 |
* | pan/bi: Lower combines to rewrites for scalars | Alyssa Rosenzweig | 2020-03-24 | 1 | -7/+141 |
* | pan/bi: Ingest vecN directly (again) | Alyssa Rosenzweig | 2020-03-24 | 7 | -48/+89 |
* | panfrost: Align Android makefiles with recent changes | Roman Stratiienko | 2020-03-23 | 4 | -1/+62 |
* | pan/bi: Pack csel4 opcodes | Alyssa Rosenzweig | 2020-03-22 | 2 | -1/+80 |
* | pan/bi: Default csel to "!= 0" mode | Alyssa Rosenzweig | 2020-03-22 | 1 | -0/+5 |
* | pan/bi: Use bi_lookup_immediate when packing | Alyssa Rosenzweig | 2020-03-22 | 1 | -15/+25 |
* | pan/bi: Respect shift when printing immediates | Alyssa Rosenzweig | 2020-03-22 | 3 | -2/+11 |
* | pan/bi: Implement csel fusing | Alyssa Rosenzweig | 2020-03-22 | 1 | -21/+65 |
* | pan/bi: Add `soft` NIR->BIR condition translation | Alyssa Rosenzweig | 2020-03-22 | 1 | -3/+11 |
* | pan/bi: Remove hacks for 1-bit booleans in IR | Alyssa Rosenzweig | 2020-03-22 | 4 | -8/+8 |
* | pan/bi: Lower bool to ints | Alyssa Rosenzweig | 2020-03-22 | 2 | -27/+39 |
* | pan/bi: Pack LD_ATTR | Alyssa Rosenzweig | 2020-03-22 | 3 | -11/+39 |
* | pan/bi: Pack st_vary | Alyssa Rosenzweig | 2020-03-22 | 2 | -0/+29 |
* | pan/bi: Add store_channels property | Alyssa Rosenzweig | 2020-03-22 | 3 | -1/+7 |
* | pan/bi: Generalize data register setting | Alyssa Rosenzweig | 2020-03-22 | 1 | -3/+15 |
* | pan/bi: Flesh out st_vary IR | Alyssa Rosenzweig | 2020-03-22 | 4 | -15/+16 |
* | pan/bi: Pack ld_var_addr | Alyssa Rosenzweig | 2020-03-22 | 4 | -1/+42 |
* | pan/bi: Pack ld_ubo ops | Alyssa Rosenzweig | 2020-03-22 | 2 | -0/+50 |
* | pan/bi: Add bi_load32_components helper | Alyssa Rosenzweig | 2020-03-22 | 2 | -0/+11 |
* | pan/bi: Include UBO index for sysval reads | Alyssa Rosenzweig | 2020-03-22 | 1 | -1/+1 |
* | pan/bi: Index out constants in instructions | Alyssa Rosenzweig | 2020-03-22 | 1 | -28/+90 |
* | pan/bi: Document constant related errata(?) | Alyssa Rosenzweig | 2020-03-22 | 1 | -0/+5 |
* | pan/bi: Pack a constant quadword | Alyssa Rosenzweig | 2020-03-22 | 2 | -1/+50 |
* | pan/bi: Add move lowering pass | Alyssa Rosenzweig | 2020-03-22 | 1 | -0/+43 |
* | pan/bi: Add bi_emit_before helper | Alyssa Rosenzweig | 2020-03-22 | 1 | -0/+9 |
* | pan/bi: Implement FMA/MOV without modifiers | Alyssa Rosenzweig | 2020-03-22 | 5 | -5/+26 |
* | pan/bi: Pack BI_BLEND | Alyssa Rosenzweig | 2020-03-19 | 2 | -0/+18 |
* | pan/bi: Flesh out BI_BLEND | Alyssa Rosenzweig | 2020-03-19 | 1 | -1/+7 |
* | pan/bi: Add ATEST packing | Alyssa Rosenzweig | 2020-03-19 | 2 | -0/+38 |
* | pan/bi: Flesh out ATEST in IR | Alyssa Rosenzweig | 2020-03-19 | 2 | -2/+17 |
* | pan/bi: Track clause types during scheduling | Alyssa Rosenzweig | 2020-03-19 | 1 | -0/+47 |
* | pan/bi: Don't hide SCHED_ADD inside HI_LATENCY | Alyssa Rosenzweig | 2020-03-19 | 2 | -13/+13 |
* | pan/bi: Pretty-print clause types in disassembler | Alyssa Rosenzweig | 2020-03-19 | 4 | -3/+40 |
* | pan/bi: Route through clause header | Alyssa Rosenzweig | 2020-03-19 | 2 | -5/+26 |
* | pan/bi: Skip over data registers in port assignment | Alyssa Rosenzweig | 2020-03-19 | 3 | -10/+28 |
* | pan/bi: Emit load_vary ops | Alyssa Rosenzweig | 2020-03-19 | 2 | -0/+45 |
* | pan/bi: Pass second src for load_vary ops | Alyssa Rosenzweig | 2020-03-19 | 1 | -1/+10 |
* | pan/bi: Generalize bi_get_src a bit | Alyssa Rosenzweig | 2020-03-19 | 1 | -8/+33 |
* | pan/bi: List ADD classes in bi_pack_add | Alyssa Rosenzweig | 2020-03-19 | 1 | -2/+32 |
* | pan/bi: Pack fadd32 | Alyssa Rosenzweig | 2020-03-19 | 2 | -0/+25 |
* | pan/bi: Pack BI_FMA ops | Alyssa Rosenzweig | 2020-03-19 | 1 | -6/+84 |
* | pan/bi: Add struct bifrost_fma_fma | Alyssa Rosenzweig | 2020-03-19 | 1 | -0/+16 |
* | pan/bi: Model 3-bit Bifrost srcs in IR | Alyssa Rosenzweig | 2020-03-19 | 2 | -1/+14 |
* | pan/bi: Route through first_instruction field | Alyssa Rosenzweig | 2020-03-19 | 1 | -2/+3 |
* | pan/bi: Assign registers to ports | Alyssa Rosenzweig | 2020-03-19 | 1 | -9/+86 |
* | pan/bi: Add missing __attribute__((packed)) | Alyssa Rosenzweig | 2020-03-19 | 1 | -13/+13 |
* | pan/bi: Pack register fields | Alyssa Rosenzweig | 2020-03-19 | 1 | -4/+53 |