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* android: pass -std=c99 by defaultChia-I Wu2011-11-263-8/+2
* vbo: fix !FEATURE_beginend buildChia-I Wu2011-11-251-0/+6
* i965/gen6: Fix GPU hang when using stencil buffer without depthChad Versace2011-11-231-0/+5
* i915: Fix complete texturing regression since 27505a105aEric Anholt2011-11-231-0/+2
* i915: Fix build since hiz merge.Eric Anholt2011-11-236-24/+29
* mesa: fix incorrect error message in format_unpack.cBrian Paul2011-11-231-1/+2
* mesa: update comment for clear_teximage_fields()Brian Paul2011-11-221-9/+2
* mesa: re-implement unpacking of DEPTH_COMPONENT32FMarek Olšák2011-11-231-0/+9
* i915: Move the texture format setup for this driver out of shared code.Eric Anholt2011-11-224-42/+54
* i965: Drop intel_context.c's texture format set up for this driver.Eric Anholt2011-11-221-87/+0
* i965: Add support for ARGB2101010 rendering.Eric Anholt2011-11-221-1/+1
* i965: Add support for RGBA_16 unorm rendering.Eric Anholt2011-11-221-1/+1
* i965: Add support for half-float formats.Eric Anholt2011-11-221-7/+11
* mesa: Fix unpack for MESA_FORMAT_INTENSITY_FLOAT16.Eric Anholt2011-11-221-1/+1
* mesa: Fall back to float16 if float32 isn't supported in ChooseTexFormat.Eric Anholt2011-11-221-0/+11
* mesa: Add fallback from RGB_FLOAT16 to RGBA_FLOAT16 before RGBA_FLOAT32.Eric Anholt2011-11-221-0/+1
* i965: Reorganize MESA_FORMAT -> BRW_SURFACEFORMAT table.Eric Anholt2011-11-221-48/+146
* i965: Mark texture formats as supported using the surface formats table.Eric Anholt2011-11-221-1/+12
* intel: Improve debug output for begin/finish render texture.Eric Anholt2011-11-221-4/+4
* intel: Remove duplicate test for texture attachment completeness.Eric Anholt2011-11-221-8/+0
* i965: Don't require spans (swrast) support to consider a format FBO complete.Eric Anholt2011-11-221-3/+10
* i965: Use the surface format table to determine render target supportedness.Eric Anholt2011-11-224-60/+95
* intel: Add the context to the render_target_supported() vtbl method.Eric Anholt2011-11-227-8/+10
* i965: Add a table of the surface format information from the PRM.Eric Anholt2011-11-221-0/+204
* mesa: Make formats.c "datatype" values match glGetTexLevelParameter return.Eric Anholt2011-11-223-9/+14
* mesa: Don't report types for 0-sized components of textures.Eric Anholt2011-11-221-50/+69
* gallium: separate out floating-point CAPs into its own enumMarek Olšák2011-11-221-6/+11
* gallium: remove PIPE_CAP_GLSL and enable GLSL unconditionallyMarek Olšák2011-11-221-17/+12
* mesa: rename the AMD_conservative_depth extension flag to ARBMarek Olšák2011-11-222-3/+3
* st/mesa: quick fix of CopyPixels with GL_DEPTH_STENCILMarek Olšák2011-11-221-0/+7
* Merge branch 'hiz' of ssh://people.freedesktop.org/~chadversary/mesaChad Versace2011-11-2242-792/+2130
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| * i965/gen6: Enable HiZ by defaultChad Versace2011-11-221-6/+2
| * intel: Use separate stencil whenever possibleChad Versace2011-11-222-2/+2
| * i965: Implement the actual tables for texture alignment units [v2]Kenneth Graunke2011-11-223-13/+105
| * i965/gen6: Set vertical alignment in SURFACE_STATE batchChad Versace2011-11-222-6/+11
| * intel: Store miptree alignment units in the miptreeChad Versace2011-11-224-32/+26
| * intel: Enable HiZ for texture renderbuffersChad Versace2011-11-221-0/+7
| * intel: Resolve buffers in intel_map_renderbuffer()Chad Versace2011-11-221-0/+5
| * intel: Resolve buffers in intel_map_texture_image()Chad Versace2011-11-221-0/+5
| * intel: Mark needed resolves when first enabling HiZ on a miptreeChad Versace2011-11-221-1/+20
| * i965: Mark that depth buffer needs depth resolve after drawingChad Versace2011-11-221-0/+23
| * intel: Resolve buffers in intelSpanRenderStartChad Versace2011-11-221-1/+39
| * intel: Refactor intelSpanRenderStartChad Versace2011-11-221-16/+25
| * i965: Resolve buffers before drawing [v2]Chad Versace2011-11-221-0/+73
| * i965: Prevent recursive calls to FLUSH_VERTICES [v2]Chad Versace2011-11-221-0/+66
| * i965/gen6: Manipulate state batches for HiZ meta-ops [v4]Chad Versace2011-11-228-9/+74
| * i965/gen6: Complete stubs for HiZ buffer resolvesChad Versace2011-11-221-2/+298
| * i965: Add HiZ operation state to brw_contextChad Versace2011-11-221-0/+35
| * intel: Add resolve functions for renderbuffersChad Versace2011-11-222-0/+94
| * intel: Add resolve functions for miptreesChad Versace2011-11-222-1/+174
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