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* i965/gen5: Fix grf_used calculation for 16-wide.Eric Anholt2011-06-241-5/+4
* i965: fix mask used to write to clip distance registers when gen>6Paul Berry2011-06-241-1/+1
* intel: Fix workaround for _mesa_update_framebufferChad Versace2011-06-241-3/+5
* intel: Change framebuffer validation criteriaChad Versace2011-06-241-10/+3
* intel: In intel_update_wrapper, support s8z24 textures when using separate st...Chad Versace2011-06-241-6/+35
* intel: Factor region updates out of intel_update_wrapperChad Versace2011-06-241-0/+18
* intel: During glTexImage, allocate renderbuffers for faking s8z24 texturesChad Versace2011-06-241-0/+62
* intel: Declare some functions in intel_fbo.c as non-staticChad Versace2011-06-242-2/+14
* intel: Change signature of intel_create_wrapped_renderbufferChad Versace2011-06-242-22/+12
* intel: Perform gather on s8z24 texture images during glGetTexImageChad Versace2011-06-241-0/+8
* intel: Define functions intel_texture_s8z24_scatter/gatherChad Versace2011-06-241-0/+70
* intel: Add fields to intel_texture for faking s8z24 with separate stencilChad Versace2011-06-243-12/+40
* st/mesa: add PIPE_FORMAT_R8G8B8A8_UNORM as the first RGBA format.Stéphane Marchesin2011-06-241-1/+1
* mesa: don't allocate memory in _mesa_unpack_depth_span if we don't need itMarek Olšák2011-06-241-7/+7
* mesa: fix a memory leak in _mesa_unpack_depth_spanMarek Olšák2011-06-241-0/+1
* mesa: fix texstore of DEPTH24_STENCIL8 if srcFormat is STENCIL_INDEXMarek Olšák2011-06-241-3/+6
* mesa: remove unused function _mesa_new_depthstencil_renderbufferMarek Olšák2011-06-242-26/+0
* st/mesa: fix pipe_get_transfer() call in fallback_copy_texsubimage()Brian Paul2011-06-241-1/+2
* i965: Make the brw_format_for_mesa_format table static const.Eric Anholt2011-06-241-1/+1
* i965: Don't bother telling swrast_setup about state updates until fallback.Eric Anholt2011-06-243-1/+4
* i965: Don't bother telling tnl about state updates unless we fall back.Eric Anholt2011-06-244-2/+18
* i965: Reuse existing program data when a new compiled program matches.Eric Anholt2011-06-242-20/+82
* st/mesa: fix all_varyings_in_vbos() regressionBrian Paul2011-06-241-1/+17
* Fix 24bpp software renderingMarc Pignat2011-06-243-4/+89
* dri/r200: properly spell current_atom.Stéphane Marchesin2011-06-231-1/+1
* dri/r200: rename __atom to current_atom.Stéphane Marchesin2011-06-231-3/+3
* mesa: fix incorrect error stringBrian Paul2011-06-231-1/+1
* st/mesa: fix format selection regressionBrian Paul2011-06-231-3/+7
* vbo: Don't discount stride == 0 for testing all varyings in VBOs.Eric Anholt2011-06-231-2/+1
* vbo: Don't bother checking for stride == 0 for "any varying in a VBO".Eric Anholt2011-06-231-2/+1
* i965/gen6: Add a couple more packets to the nonpipelined workaround list.Eric Anholt2011-06-231-0/+6
* intel: Implement DRIimageExtension::dupImageBenjamin Franzke2011-06-231-1/+26
* st/mesa: use a helper for st_framebuffer creationChia-I Wu2011-06-231-18/+29
* st/mesa: prefer native texture formats when possible.Stéphane Marchesin2011-06-224-8/+101
* r600c: add missing bank tiling case for evergreenAlex Deucher2011-06-221-0/+3
* mesa: comments and 80-column wrappingBrian Paul2011-06-221-6/+21
* mesa: update comments in update_program_enables()Brian Paul2011-06-221-1/+4
* mesa: update/fix comments in update_program()Brian Paul2011-06-221-17/+16
* mesa: update comment for gl_texture_unitBrian Paul2011-06-221-2/+1
* r600c: use BASE_VTX_LOC & AUTO_INDEX for drawing nonindexed with offsetAndre Maasikas2011-06-221-60/+8
* intel: Allocate s8_z24 non-texture renderbuffers when using separate stencilChad Versace2011-06-211-3/+81
* intel: Unobfuscate intel_alloc_renderbuffer_storageChad Versace2011-06-211-17/+17
* intel: Add fields to intel_renderbuffer for unwrapping packed depth/stencil b...Chad Versace2011-06-214-44/+118
* intel: Unconditionally enable support for S8_Z24 texture formatChad Versace2011-06-211-1/+1
* st/mesa: Invalidate drawables on context switchBenjamin Franzke2011-06-211-9/+13
* st/mesa: Remove unneeded texture format terminators.Stéphane Marchesin2011-06-201-2/+2
* st/mesa: put const qualifer on format_map tableBrian Paul2011-06-201-1/+1
* i965/gen6: Apply documented workaround for nonpipelined state packets.Eric Anholt2011-06-203-1/+45
* i965/gen6: Limit the workaround flush to once per primitive.Eric Anholt2011-06-205-0/+16
* i965/gen6: Use an BO instead of writing to address 0 for PIPE_CONTROL W/A.Eric Anholt2011-06-204-3/+23
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