aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers
Commit message (Expand)AuthorAgeFilesLines
* dri: Pass API_OPENGL_CORE through to the driversIan Romanick2012-08-136-20/+100
* intel: Reserve enough space to finish occlusion queries on Gen6.Kenneth Graunke2012-08-122-1/+15
* intel: Move finish_batch() call before MI_BATCH_BUFFER_END and padding.Kenneth Graunke2012-08-121-3/+3
* i965: Add perf debug for stalls during shader compiles.Eric Anholt2012-08-124-2/+45
* i965: Add performance debug for when the state cache gets nuked.Eric Anholt2012-08-121-1/+4
* i965: Add performance debug for shader recompiles.Eric Anholt2012-08-126-0/+103
* i965: Add performance debug for fast clear fallbacks.Eric Anholt2012-08-121-1/+9
* intel: Add performance debug for some common GPU stalls.Eric Anholt2012-08-123-1/+19
* i965: Add performance debug for register spilling.Eric Anholt2012-08-122-0/+8
* i965: Add INTEL_DEBUG=perf for failure to compile 16-wide shaders.Eric Anholt2012-08-123-2/+11
* intel: Rename INTEL_DEBUG=fall to INTEL_DEBUG=perf.Eric Anholt2012-08-127-10/+11
* meta: texture rectangle textures may not have mipmapsPauli Nieminen2012-08-121-2/+4
* meta: Use sampler object for mipmap generationPauli Nieminen2012-08-121-25/+27
* mesa: Remove unnecessary parameters CompressedTexImagePauli Nieminen2012-08-121-2/+0
* mesa: Remove unnecessary parameters from AllocTextureImageBufferPauli Nieminen2012-08-123-11/+6
* mesa: Remove unnecessary parameters from TexImagePauli Nieminen2012-08-123-60/+17
* intel: Always downsample in intel_miptree_map_multisampleChad Versace2012-08-091-3/+0
* i965/gen6+: Add support for edge flags.Eric Anholt2012-08-093-6/+51
* i965/vs: Convert EdgeFlagPointer values appropriately for the VS on gen4.Eric Anholt2012-08-091-0/+10
* i965/vs: Add comment noting copy_edgeflag state dependency.Eric Anholt2012-08-091-0/+2
* i965/vs: Add support for copying user edge flags.Eric Anholt2012-08-091-2/+11
* i965/fs: Fix the FS inputs setup when some SF outputs aren't used in the FS.Olivier Galibert2012-08-092-2/+25
* intel: use _mesa_meta_Clear with OpenGL ES 1.1 v2Tapani Pälli2012-08-082-4/+9
* i965: Rework the extra flushes surrounding occlusion queries.Kenneth Graunke2012-08-081-7/+4
* i965/vs: Protect pow(x,y) MOV of y on gen4 from other instruction flags.Eric Anholt2012-08-081-0/+4
* i965: Drop the confusing saturate argument to math instruction setup.Eric Anholt2012-08-088-44/+6
* i965: Make brw_set_saturate() use stdbool.Eric Anholt2012-08-082-3/+3
* i965: Use 64-bit writes for occlusion queries.Kenneth Graunke2012-08-081-2/+3
* i965: Refactor depth count write PIPE_CONTROLs into a helper function.Kenneth Graunke2012-08-081-68/+43
* i965: Emit a CS stall before timestamp writes.Kenneth Graunke2012-08-081-0/+14
* i965: Use 64-bit writes for timestamp queries.Kenneth Graunke2012-08-081-2/+3
* i965: Refactor timestamp write PIPE_CONTROLs into a helper function.Kenneth Graunke2012-08-081-50/+30
* intel: Make the length for PIPE_CONTROL explicit.Kenneth Graunke2012-08-084-20/+20
* swrast: add missing switch case for API_OPENGL_COREBrian Paul2012-08-081-0/+2
* i965: Enable uniform buffer objects on gen6+.Eric Anholt2012-08-071-0/+1
* i965/vs: Add support for loading uniform buffer variables as pull constants.Eric Anholt2012-08-072-2/+55
* i965/fs: Add support for loading uniform buffer variables as pull constants.Eric Anholt2012-08-073-1/+50
* i965/vs: Add a surface index to VS_OPCODE_PULL_CONSTANT instructions.Eric Anholt2012-08-073-10/+17
* i965/fs: Communicate the pull constant block read parameters through fs_regs.Eric Anholt2012-08-073-6/+20
* i965: Bind UBOs as surfaces like we do for pull constants.Eric Anholt2012-08-076-3/+110
* i965: Add an offset argument to constant buffer setup.Eric Anholt2012-08-075-6/+11
* glsl: Add a "ubo_load" expression type for fetches from UBOs.Eric Anholt2012-08-073-0/+13
* mesa: Replace VersionMajor/VersionMinor with a Version field.Eric Anholt2012-08-074-12/+4
* intel: Fix compiler warnings from winsys msaa.Eric Anholt2012-08-072-3/+1
* intel: Advertise multisample DRI2 configs on gen >= 6Chad Versace2012-08-071-3/+51
* intel: Clarify intel_screen_make_configsChad Versace2012-08-071-20/+16
* dri: Simplify use of driConcatConfigsChad Versace2012-08-074-14/+9
* intel: Refactor creation of DRI2 configsChad Versace2012-08-071-91/+98
* intel: Downsample on DRI2 flushChad Versace2012-08-071-0/+31
* intel: Support mapping multisample miptreesChad Versace2012-08-072-6/+126
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-03 08:00:27 +0000