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path: root/src/mesa/drivers/dri
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* nouveau: rework and simplify nv04/nv05 driver a bitBen Skeggs2012-04-148-300/+215
* nouveau/vieux: switch to libdrm_nouveau-2.0Ben Skeggs2012-04-1446-1890/+1844
* i965: fix typoDylan Noblesmith2012-04-131-1/+1
* i965: When the kernel lacks the LLC check, assume it's present on gen >= 6.Eric Anholt2012-04-111-3/+7
* intel: Drop backwards compat code for not having libdrm with the LLC check.Eric Anholt2012-04-111-4/+0
* i965/fs: Avoid generating extra AND instructions on bool logic ops.Eric Anholt2012-04-111-22/+14
* i965/fs: Try to avoid generating extra MOVs to do saturates.Eric Anholt2012-04-113-12/+54
* i965: Stop lying about cpp and height of a stencil buffer.Paul Berry2012-04-105-45/+66
* i965: Add support for sampling texture buffer objects on gen7+.Eric Anholt2012-04-094-1/+71
* i965: Add real support for texturing/rendering with MESA_FORMAT_RGBA8888_REV.Eric Anholt2012-04-091-5/+1
* i965/gen7: Fix the /* ignored */ comment on constant surface setup.Eric Anholt2012-04-091-1/+1
* i965: Remove vestiges of function call support from the old VS backend.Kenneth Graunke2012-04-094-188/+0
* i915: set SPRITE_POINT_ENABLE bit correctlyYuanhan Liu2012-04-094-12/+48
* i965: Actually upload sampler state pointers for the VS unit on Gen6.Kenneth Graunke2012-04-051-1/+1
* glsl: Demote 'type' from ir_instruction to ir_rvalue and ir_variable.Kenneth Graunke2012-04-021-1/+1
* i965/aub: Dump a final bitmap from DestroyContext.Kenneth Graunke2012-04-023-29/+41
* intel: add PCI IDs for Ivy Bridge GT2 server variantEugeni Dodonov2012-04-012-1/+4
* intel: Add some PCI IDs for Haswell.Kenneth Graunke2012-03-302-2/+20
* i965: Set "Shader Channel Select" fields in Haswell's SURFACE_STATE.Kenneth Graunke2012-03-303-1/+37
* i965: Fill in Sample Mask in Haswell's 3DSTATE_PS.Kenneth Graunke2012-03-302-0/+5
* i965: Set "Stencil Buffer Enable" bit on Haswell.Kenneth Graunke2012-03-302-1/+5
* i965: Set Line Stipple enable bit in 3DSTATE_SF for Haswell.Kenneth Graunke2012-03-302-0/+5
* i965: Update max VS/PS threads shift offsets for Haswell.Kenneth Graunke2012-03-304-4/+10
* i965: Disable HiZ on Haswell for now.Kenneth Graunke2012-03-301-1/+1
* i965: Add initial IS_HASWELL() macros.Kenneth Graunke2012-03-303-5/+14
* i965: Avoid explicit accumulator operands in SIMD16 mode on Gen7.Kenneth Graunke2012-03-301-0/+3
* intel: fix un-blanced map_refcount issueYuanhan Liu2012-03-281-4/+4
* intel: fix TFP at 16-bppDave Airlie2012-03-251-6/+11
* intel: fix null dereference processing HiZ bufferDylan Noblesmith2012-03-221-0/+6
* intel: Make use of the new GPU-unsynchronized map functionality in libdrm.Eric Anholt2012-03-211-1/+3
* intel: Drop the tracking of bo_map vs bo_map_gtt for unmapping.Eric Anholt2012-03-212-15/+2
* i965: Avoid flushing the batch for busy BOs for ARB_mbr with INVALIDATE_BUFFER.Eric Anholt2012-03-211-15/+20
* intel: Handle devid overrides using libdrm.Eric Anholt2012-03-211-19/+4
* intel: Ask libdrm to dump an AUB file if INTEL_DEBUG=aub.Eric Anholt2012-03-213-0/+37
* drirc: Add missing XML attributes that made the driconf application whine.Eric Anholt2012-03-211-4/+4
* i965: Change the hiz-override env var to a driconf option.Eric Anholt2012-03-203-28/+13
* i965: Drop the INTEL_FORCE_GS environment variable.Eric Anholt2012-03-201-5/+0
* intel: Drop the INTEL_NO_BLIT debug environment variable.Eric Anholt2012-03-201-5/+3
* intel: Drop the INTEL_STRICT_CONFORMANCE environment variable.Eric Anholt2012-03-203-44/+6
* intel: Fix a case when mapping large texture failsAnuj Phogat2012-03-202-10/+23
* Add Makefile.in to toplevel .gitignoreKenneth Graunke2012-03-207-7/+0
* Add .deps/, .libs/, and *.la to toplevel .gitignorePaul Berry2012-03-207-21/+0
* mesa: rework texture completeness testingBrian Paul2012-03-201-1/+1
* i915: fallback for NPOT cubemap textureYuanhan Liu2012-03-191-0/+22
* dri_util: add copyright/license blurbBrian Paul2012-03-171-0/+24
* i965/fs: Jump from discard statements to the end of the program when done.Eric Anholt2012-03-164-5/+126
* i965: Add disasm for gen6+ UIP/JIP on BREAK/CONT/HALT.Eric Anholt2012-03-161-0/+4
* i965: Enable SIMD16 mode for shaders with loops on Gen6+.Kenneth Graunke2012-03-141-1/+1
* radeon: remove use of DD_FLATSHADEBrian Paul2012-03-121-1/+1
* i915: remove occurances of _DD_NEW_x flagsBrian Paul2012-03-121-7/+5