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* Revert "Fix image_matches_texture_obj() MaxLevel check"Will Dyson2010-06-191-7/+4
* intel: Finalize the miptree before mapping it for fallbacks.Eric Anholt2010-06-181-0/+2
* i965: Fix the name of aa_coverage_slope in the improved AA line params.Eric Anholt2010-06-181-1/+1
* intel: Remove unnecessary headers.Vinson Lee2010-06-162-6/+0
* r600: GL_COORD_REPLACE state is only relevant when point sprites are enabled.Henri Verbeet2010-06-161-6/+11
* r600: fix warningsMarc2010-06-161-2/+2
* i965: Remove unnecessary header.Vinson Lee2010-06-141-1/+0
* i965: Fix surface state dumping with INTEL_DEBUG=batch.Eric Anholt2010-06-141-2/+2
* i965: correct the gen6 line stipple enable define.Zhenyu Wang2010-06-141-1/+1
* intel: Remove long-dead comment about releasing texture heaps.Eric Anholt2010-06-141-15/+0
* i965: Fix gen6 front cull mode.Eric Anholt2010-06-121-1/+1
* i965: Use the new message header format for FF_SYNC on gen6.Zhenyu Wang2010-06-121-2/+7
* i965: Add support for math instructions in the gen6 WM.Zhenyu Wang2010-06-121-0/+15
* i965: Set the correct WM GRF start reg on gen6.Zhenyu Wang2010-06-121-1/+2
* i965: Update gen6 paths for the streaming rework.Eric Anholt2010-06-123-31/+4
* i965: Stream out CC unit state.Eric Anholt2010-06-123-155/+66
* r300/compiler: fix scons buildJoakim Sindholt2010-06-121-0/+1
* i965: Remove unnecessary header.Vinson Lee2010-06-121-1/+0
* r300/compiler: Handle more complex conditionals in loops.Tom Stellard2010-06-111-71/+84
* r300/compiler: Fix warning.Tom Stellard2010-06-111-1/+1
* r300/compiler: Handle SGT and SLE at the beginning of loops.Tom Stellard2010-06-111-3/+11
* r300/compiler: Verify assumptions about opcode types.Tom Stellard2010-06-111-4/+33
* r300/compiler: Unroll loops that decrement the counter.Tom Stellard2010-06-111-49/+83
* r300/compiler: Unroll loops that have a constant number of iterations.Tom Stellard2010-06-111-2/+209
* r300/compiler: Implement simple loop emulationTom Stellard2010-06-116-0/+230
* i965: Remove the surface key used to generate constant surfaces.Eric Anholt2010-06-113-62/+14
* i965: Warning fixes from the i965-streaming merge.Eric Anholt2010-06-112-11/+0
* i965: Use the state base address to avoid relocations.Eric Anholt2010-06-113-38/+23
* i965: GC the last two arguments to brw_cache_data.Eric Anholt2010-06-117-22/+12
* i965: Remove brw_state_cache_bo_delete now that it's unused again.Eric Anholt2010-06-112-37/+0
* i965: Remove caching of surface state objects.Eric Anholt2010-06-118-288/+192
* i965: Convert the binding table to streamed indirect state.Eric Anholt2010-06-117-145/+131
* i965: Split constant buffer setup from its surface state/binding state.Eric Anholt2010-06-118-78/+79
* i965: Add support for streaming indirect state rather than caching objects.Eric Anholt2010-06-115-1/+66
* i965: Set the CC VP state immediately on state change.Eric Anholt2010-06-117-12/+67
* i965: Update old comment about state cache sizing.Eric Anholt2010-06-111-2/+2
* i965: Move no_batch_wrap assertion out across the area we're trying to verify.Eric Anholt2010-06-111-5/+3
* i965: remove UseProgram driver callbackBrian Paul2010-06-101-10/+0
* intel: Remove unnecessary header.Vinson Lee2010-06-101-1/+0
* i965: Add support for GL_ALPHA framebuffer objects.Eric Anholt2010-06-106-14/+85
* intel: Use the blitter to upload TexSubImage data to busy textures.Eric Anholt2010-06-091-10/+67
* i965: Avoid calloc/free in the CURBE upload process.Eric Anholt2010-06-095-20/+26
* intel: Flag NEW_BUFFERS when changing draw buffers.Eric Anholt2010-06-081-0/+1
* intel: Convert remaining dri_bo_emit_reloc to drm_intel_bo_emit_reloc.Eric Anholt2010-06-089-60/+41
* intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt2010-06-0844-272/+277
* intel: Clean up stale comments in intel_batchbuffer.c.Eric Anholt2010-06-081-4/+1
* intel: Remove the non-gem paths for batchbuffer upload.Eric Anholt2010-06-081-22/+4
* intel: Update comment in intel_tex_copy from before miptree x/y rework.Eric Anholt2010-06-081-1/+1
* r600: Make next_inst() static.Henri Verbeet2010-06-082-59/+61
* r600: Assert output registers have a valid export index.Henri Verbeet2010-06-081-0/+4
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