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* i965/cs: Emit compute shader code and upload programsJordan Justen2015-05-023-0/+212
* i965/cs: Set invocation counts based on max_cs_threadsJordan Justen2015-05-021-0/+24
* i965/cs: Add max_cs_threadsJordan Justen2015-05-024-1/+14
* i965: Remove comment about chv device numbers being preliminaryJordan Justen2015-05-021-3/+0
* i965/fs: Support compute programs in fs_visitorJordan Justen2015-05-024-3/+93
* i965/cache: Add support for CS in program state cacheJordan Justen2015-05-024-0/+54
* i965/cs: Add brw_cs_prog_data, brw_cs_prog_key and brw_context::cs.Paul Berry2015-05-022-0/+62
* i965/cs: Add generator support for CS_OPCODE_CS_TERMINATEJordan Justen2015-05-022-0/+36
* i965/cs: Mark g0 as used by CS_OPCODE_CS_TERMINATEJordan Justen2015-05-021-0/+4
* i965/fs: Add emit_cs_terminate to emit CS_OPCODE_CS_TERMINATEJordan Justen2015-05-022-0/+23
* i965/cs: Add CS_OPCODE_CS_TERMINATEJordan Justen2015-05-022-0/+7
* i965/cs: Add BRW_NEW_CS_PROG_DATA and BRW_CACHE_CS_PROGJordan Justen2015-05-023-0/+6
* i965: Add an INTEL_DEBUG=cs option.Paul Berry2015-05-022-2/+4
* i965/cs: Add BRW_NEW_COMPUTE_PROGRAM state flag.Paul Berry2015-05-022-0/+9
* i965/fs: Strip trailing constant zeroes in sample messagesNeil Roberts2015-05-012-0/+50
* i965/skl: Force the exec size to 8 when initing header for SIMD4x2Neil Roberts2015-05-012-0/+2
* i965: Unhardcode a few more stage names and abbreviations.Kenneth Graunke2015-04-302-11/+5
* i965/blorp: Prepare drawing rectangle for flipped coordinatesTopi Pohjolainen2015-04-301-2/+2
* i965/blorp: Add support for layered renderingTopi Pohjolainen2015-04-304-5/+9
* i965/blorp: Allow blend state to be set for multiple render targetsTopi Pohjolainen2015-04-303-19/+18
* i965/blorp: Prepare for attributes other than render positionTopi Pohjolainen2015-04-304-7/+12
* i965/blorp: Remove unused argumentsTopi Pohjolainen2015-04-303-21/+12
* i965/gen7/blorp: Remove unused argumentsTopi Pohjolainen2015-04-301-47/+28
* i965/blorp: Allow caller to provide sampler settingsTopi Pohjolainen2015-04-303-8/+14
* i965/blorp: Refactor vertex buffer state setupTopi Pohjolainen2015-04-301-26/+34
* i965/blorp: Remove constant parameterTopi Pohjolainen2015-04-303-20/+0
* i965/gen8: Expose state base address setupTopi Pohjolainen2015-04-302-2/+5
* i965/ps/gen8: Refactor state uploadingTopi Pohjolainen2015-04-302-26/+58
* i965/ps/gen7: Refactor state uploadingTopi Pohjolainen2015-04-302-20/+45
* i965: Refactor sampler state setupTopi Pohjolainen2015-04-302-22/+47
* i965: Remove dependency to tex object in default color setupTopi Pohjolainen2015-04-301-11/+11
* i965: Refactor and expose brw_upload_binding_table()Topi Pohjolainen2015-04-302-7/+21
* i965: Expose and refactor brw_update_renderbuffer_surfaces()Topi Pohjolainen2015-04-302-21/+35
* i965: Refactor rb surface setup to allow caller to store offsetsTopi Pohjolainen2015-04-305-58/+59
* i965/gen8: Use constant pointers for reading miptree detailsTopi Pohjolainen2015-04-301-2/+2
* i965/ps: Use SET_FIELD() for sampler countTopi Pohjolainen2015-04-303-4/+7
* i965: Don't try to apply the opt_sampler_eot extension for vsNeil Roberts2015-04-291-0/+3
* i965/vs: Remove unnecessary NULL check on generate_code() result.Kenneth Graunke2015-04-271-2/+1
* i965: Enable ARB_gpu_shader5 on Gen8+.Matt Turner2015-04-271-6/+2
* i965/fs: Fix code emission for imul_high in NIR.Matt Turner2015-04-271-1/+23
* i965/fs: Fix stride for multiply in macro.Matt Turner2015-04-271-0/+2
* Revert "i965/fs: Allow SIMD16 borrow/carry/64-bit multiply on Gen > 7."Matt Turner2015-04-271-3/+3
* Fix a few typosZoë Blade2015-04-2716-25/+25
* i965/gen8: Factor out texture surface state set-up from gen8_update_texture_s...Francisco Jerez2015-04-271-60/+77
* i965/gen7: Factor out texture surface state set-up from gen7_update_texture_s...Francisco Jerez2015-04-272-54/+84
* i965: Add helper functions to calculate the slice pitch of an array or 3D mip...Francisco Jerez2015-04-272-40/+84
* i965: Fill out the rest of brw_debug_recompile_sampler_key().Kenneth Graunke2015-04-251-0/+8
* i965: Disassemble sampler message names on Gen5+.Kenneth Graunke2015-04-251-4/+34
* i965/fs: Disallow constant propagation into POW on Gen 6.Matt Turner2015-04-251-2/+8
* i965/fs: Add missing pixel_x/y to brw_instruction_name().Matt Turner2015-04-241-0/+5
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