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* radeon: add radeon_bo_is_referenced_by_cs functionMaciej Cencora2009-11-141-0/+13
* radeon: remove unnecessary call to radeonEmitStateMaciej Cencora2009-11-141-2/+0
* r300: add missing texformatMaciej Cencora2009-11-141-0/+1
* r300: remove unneeded includesMaciej Cencora2009-11-143-5/+0
* r300, r300g: Add missing registers.Corbin Simpson2009-11-111-0/+2
* Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt2009-11-101-1/+11
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| * i965: Fix VS constant buffer value loading.Eric Anholt2009-11-101-1/+11
| * i965: Unalias src/dst registers for SGE and friends.Eric Anholt2009-11-101-19/+21
| * i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt2009-11-101-1/+1
| * r600: don't emit htile regsAlex Deucher2009-11-091-4/+2
| * Fix YTILE spantmp functionsAlan Hourihane2009-11-041-2/+2
* | i965: avoid memsetting all the BRW_WM_MAX_INSN arrays for every compile.Eric Anholt2009-11-104-4/+23
* | i965: Add a note explaining the data cache domain.Eric Anholt2009-11-101-1/+4
* | i965: Unalias src/dst registers for SGE and friends.Eric Anholt2009-11-101-19/+21
* | i965: Allow use of PROGRAM_LOCAL constants in ARB_vp.Eric Anholt2009-11-101-1/+1
* | r600/r700: typo, fix mask of DB_ALPHA_TO_MASKJerome Glisse2009-11-091-3/+3
* | r600: rework DB render setupAlex Deucher2009-11-094-42/+73
* | r600: don't emit htile regsAlex Deucher2009-11-091-4/+2
* | r600: add missing ZPASS setup bits for r7xx+Alex Deucher2009-11-092-0/+6
* | i965: Use Compr4 instruction compression mode on G4X and newer.Eric Anholt2009-11-063-17/+29
* | i965: Share min/max between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-063-60/+72
* | i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-064-127/+40
* | i965: Share most of the WM functions between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-063-297/+109
* | i965: Share math functions between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt2009-11-063-221/+111
* | i965: Share the sop opcodes between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt2009-11-063-74/+29
* | i965: Share OPCODE_MAD between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-063-30/+13
* | i965: Share the DP3, DP4, and DPH between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-063-99/+33
* | i965: Add generic GLSL code for unaliasing a 3-arg opcode, and share LRP code.Eric Anholt2009-11-063-45/+71
* | i965: Use a normal alu1 emit for OPCODE_TRUNC.Eric Anholt2009-11-062-34/+2
* | i965: Share basic ALU ops between brw_wm_glsl and brw_wm_emit.cEric Anholt2009-11-063-117/+38
* | i965: Collect GLSL src/dst regs up in generic code.Eric Anholt2009-11-062-7/+17
* | intel: better front color buffer test in intelClear()Brian Paul2009-11-061-2/+3
* | i965: Always pass the size argument to brw_cache_data.Eric Anholt2009-11-066-57/+21
* | intel: Finish removing the fallback code for bug #16697.Eric Anholt2009-11-061-6/+2
* | intel: Don't validate in a texture image used as a render target.Eric Anholt2009-11-063-11/+15
* | intel: Clean up some extra struct indirection in finalize.Eric Anholt2009-11-061-2/+1
* | intel: Use _mesa_get_current_tex_object() to clean up TFP path.Eric Anholt2009-11-061-4/+4
* | intel: Remove duplicated arguments from intel_miptree_match_image().Eric Anholt2009-11-063-10/+7
* | i965: Remove an XXX comment for testing some code that seems to work.Eric Anholt2009-11-061-1/+0
* | intel: Remove obsolete comment about GEM in the spans code.Eric Anholt2009-11-061-1/+0
* | intel: Use PIPE_CONTROL on gen4 hardware for doing pipeline flushing.Eric Anholt2009-11-067-51/+37
* | Make a convenient int for what chipset generation we're on.Eric Anholt2009-11-065-9/+20
* | intel: call intel_check_front_buffer_rendering() in intelClear()Brian Paul2009-11-061-0/+3
* | r600: rework draw functionsAlex Deucher2009-11-041-64/+134
* | r600: fix count prediction for IB caseAlex Deucher2009-11-041-1/+1
* | Fix YTILE spantmp functionsAlan Hourihane2009-11-041-2/+2
* | Merge branch 'mesa_7_6_branch'Brian Paul2009-11-031-1/+1
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| * Add --with-dri-searchpath argumentChow Loong Jin2009-10-301-1/+1
* | intel: avoid unnecessary front buffer flushing/updatingBrian Paul2009-11-035-2/+27
* | r600: implement LOG op in compilerPierre Ossman2009-11-022-3/+214
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