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* util: rename PIPE_ARCH_*_ENDIAN to UTIL_ARCH_*_ENDIANDylan Baker2019-11-051-1/+1
| | | | | | | | | | | As requested by Tim. This was generated with: grep 'PIPE_ARCH_.*_ENDIAN' -rIl | xargs sed -ie 's@PIPE_ARCH_\(.*\)_ENDIAN@UTIL_ARCH_\1_ENDIAN@'g v2: - add this patch Reviewed-by: Eric Engestrom <[email protected]>
* util/u_endian: set PIPE_ARCH_*_ENDIAN to 1Dylan Baker2019-11-051-1/+1
| | | | | | | | | | | | This will allow it to be used as a drop in replacement for _mesa_little_endian in a number of cases. v2: - Always define PIPE_ARCH_LITTLE_ENDIAN and PIPE_ARCH_BIG_ENDIAN, define the one that reflects the host system to 1 and the other to 0 - replace all uses of #ifdef, #ifndef, and #if defined() with #if and #if ! with PIPE_ARCH_*_ENDIAN Reviewed-by: Eric Engestrom <[email protected]>
* r100: Use preprocessor to select big vs little endian pathsDylan Baker2019-11-051-29/+20
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* radeon: Drop the unused first arg of OUT_BATCH_RELOC.Eric Anholt2019-10-201-3/+3
| | | | | | | This was a trap when trying to figure out how to fit data bits into the reloc. Reviewed-by: Marek Olšák <[email protected]>
* radeon: fix some potential big endian issuesRoland Scheidegger2015-07-161-46/+38
| | | | | | | | | | | The formats chosen (both by texture format choser, fbo storage allocation) are different for big endian not just for rgba8 but also lower bit width formats (why I don't actually know). Even the function to test for renderable formats used different formats, however the actual colorbuffer setup did not. And the blitter did not take that into account neither. Untested (what could possibly go wrong...). Acked-by: Marek Olšák <[email protected]>
* radeon/r200: mark state atoms as dirty after blitsRoland Scheidegger2015-07-161-0/+8
| | | | | | | | | | | Blit submits lots of packets which are usually handled by state atoms, so these must be dirtied. Not sure if this fixes anything, but it was a concern raised by bug 51658 (with this all issues there seen as actual bugs should be fixed, with the exception of the patch to upload non-used texenv state atoms which I just don't understand). Acked-by: Marek Olšák <[email protected]>
* radeon: replace __FUNCTION__ with __func__Marius Predut2015-04-211-1/+1
| | | | | | | | | Consistently just use C99's __func__ everywhere. No functional changes. Signed-off-by: Marius Predut <[email protected]> Acked-by: Michel Dänzer <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Change many Type P MESA_FORMATs to meet naming specMark Mueller2014-01-271-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conversion of Type P formats as follows (w/related comment fixes): s/MESA_FORMAT_RGB565\b/MESA_FORMAT_B5G6R5_UNORM/g s/MESA_FORMAT_RGB565_REV\b/MESA_FORMAT_R5G6B5_UNORM/g s/MESA_FORMAT_ARGB4444\b/MESA_FORMAT_B4G4R4A4_UNORM/g s/MESA_FORMAT_ARGB4444_REV\b/MESA_FORMAT_A4R4G4B4_UNORM/g s/MESA_FORMAT_RGBA5551\b/MESA_FORMAT_A1B5G5R5_UNORM/g s/MESA_FORMAT_XBGR8888_SNORM\b/MESA_FORMAT_R8G8B8X8_SNORM/g s/MESA_FORMAT_XBGR8888_SRGB\b/MESA_FORMAT_R8G8B8X8_SRGB/g s/MESA_FORMAT_ARGB1555\b/MESA_FORMAT_B5G5R5A1_UNORM/g s/MESA_FORMAT_ARGB1555_REV\b/MESA_FORMAT_A1R5G5B5_UNORM/g s/MESA_FORMAT_AL44\b/MESA_FORMAT_L4A4_UNORM/g s/MESA_FORMAT_RGB332\b/MESA_FORMAT_B2G3R3_UNORM/g s/MESA_FORMAT_ARGB2101010\b/MESA_FORMAT_B10G10R10A2_UNORM/g s/MESA_FORMAT_Z24_S8\b/MESA_FORMAT_S8_UINT_Z24_UNORM/g s/MESA_FORMAT_S8_Z24\b/MESA_FORMAT_Z24_UNORM_S8_UINT/g s/MESA_FORMAT_X8_Z24\b/MESA_FORMAT_Z24_UNORM_X8_UINT/g s/MESA_FORMAT_Z24_X8\b/MESA_FORMAT_X8Z24_UNORM/g s/MESA_FORMAT_RGB9_E5_FLOAT\b/MESA_FORMAT_R9G9B9E5_FLOAT/g s/MESA_FORMAT_R11_G11_B10_FLOAT\b/MESA_FORMAT_R11G11B10_FLOAT/g s/MESA_FORMAT_Z32_FLOAT_X24S8\b/MESA_FORMAT_Z32_FLOAT_S8X24_UINT/g s/MESA_FORMAT_ABGR2101010_UINT\b/MESA_FORMAT_R10G10B10A2_UINT/g s/MESA_FORMAT_XRGB4444_UNORM\b/MESA_FORMAT_B4G4R4X4_UNORM/g s/MESA_FORMAT_XRGB1555_UNORM\b/MESA_FORMAT_B5G5R5X1_UNORM/g s/MESA_FORMAT_XRGB2101010_UNORM\b/MESA_FORMAT_B10G10R10X2_UNORM/g s/MESA_FORMAT_AL88\b/MESA_FORMAT_L8A8_UNORM/g s/MESA_FORMAT_AL88_REV\b/MESA_FORMAT_A8L8_UNORM/g s/MESA_FORMAT_AL1616\b/MESA_FORMAT_L16A16_UNORM/g s/MESA_FORMAT_AL1616_REV\b/MESA_FORMAT_A16L16_UNORM/g s/MESA_FORMAT_RG88\b/MESA_FORMAT_G8R8_UNORM/g s/MESA_FORMAT_GR88\b/MESA_FORMAT_R8G8_UNORM/g s/MESA_FORMAT_GR1616\b/MESA_FORMAT_R16G16_UNORM/g s/MESA_FORMAT_RG1616\b/MESA_FORMAT_G16R16_UNORM/g s/MESA_FORMAT_SRGBA8\b/MESA_FORMAT_A8B8G8R8_SRGB/g s/MESA_FORMAT_SARGB8\b/MESA_FORMAT_B8G8R8A8_SRGB/g s/MESA_FORMAT_SLA8\b/MESA_FORMAT_L8A8_SRGB/g Conflicts: src/mesa/drivers/dri/i965/brw_surface_formats.c src/mesa/main/format_pack.c src/mesa/main/format_unpack.c src/mesa/main/formats.c src/mesa/main/texformat.c src/mesa/main/texstore.c
* mesa: Change many Type A MESA_FORMATs to meet naming standardMark Mueller2014-01-271-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update comments. Conversion of the following Type A formats: s/MESA_FORMAT_RGB888\b/MESA_FORMAT_BGR_UNORM8/g s/MESA_FORMAT_BGR888\b/MESA_FORMAT_RGB_UNORM8/g s/MESA_FORMAT_A8\b/MESA_FORMAT_A_UNORM8/g s/MESA_FORMAT_A16\b/MESA_FORMAT_A_UNORM16/g s/MESA_FORMAT_L8\b/MESA_FORMAT_L_UNORM8/g s/MESA_FORMAT_L16\b/MESA_FORMAT_L_UNORM16/g s/MESA_FORMAT_I8\b/MESA_FORMAT_I_UNORM8/g s/MESA_FORMAT_I16\b/MESA_FORMAT_I_UNORM16/g s/MESA_FORMAT_R8\b/MESA_FORMAT_R_UNORM8/g s/MESA_FORMAT_R16\b/MESA_FORMAT_R_UNORM16/g s/MESA_FORMAT_Z16\b/MESA_FORMAT_Z_UNORM16/g s/MESA_FORMAT_Z32\b/MESA_FORMAT_Z_UNORM32/g s/MESA_FORMAT_S8\b/MESA_FORMAT_S_UINT8/g s/MESA_FORMAT_SRGB8\b/MESA_FORMAT_BGR_SRGB8/g s/MESA_FORMAT_RGBA_16\b/MESA_FORMAT_RGBA_UNORM16/g s/MESA_FORMAT_SL8\b/MESA_FORMAT_L_SRGB8/g s/MESA_FORMAT_Z32_FLOAT\b/MESA_FORMAT_Z_FLOAT32/g s/MESA_FORMAT_XBGR16161616_UNORM\b/MESA_FORMAT_RGBX_UNORM16/g s/MESA_FORMAT_XBGR16161616_SNORM\b/MESA_FORMAT_RGBX_SNORM16/g s/MESA_FORMAT_XBGR16161616_FLOAT\b/MESA_FORMAT_RGBX_FLOAT16/g s/MESA_FORMAT_XBGR16161616_UINT\b/MESA_FORMAT_RGBX_UINT16/g s/MESA_FORMAT_XBGR16161616_SINT\b/MESA_FORMAT_RGBX_SINT16/g s/MESA_FORMAT_XBGR32323232_FLOAT\b/MESA_FORMAT_RGBX_FLOAT32/g s/MESA_FORMAT_XBGR32323232_UINT\b/MESA_FORMAT_RGBX_UINT32/g s/MESA_FORMAT_XBGR32323232_SINT\b/MESA_FORMAT_RGBX_SINT32/g s/MESA_FORMAT_XBGR8888_UINT\b/MESA_FORMAT_RGBX_UINT8/g s/MESA_FORMAT_XBGR8888_SINT\b/MESA_FORMAT_RGBX_SINT8/g
* mesa: Rename 4 color component unsigned byte MESA_FORMATsMark Mueller2014-01-271-7/+7
| | | | | | | | | | | | | Change all 4 color component unsigned byte formats to meet spec for P Type formats: s/MESA_FORMAT_RGBA8888\b/MESA_FORMAT_A8B8G8R8_UNORM/g s/MESA_FORMAT_RGBA8888_REV\b/MESA_FORMAT_R8G8B8A8_UNORM/g s/MESA_FORMAT_ARGB8888\b/MESA_FORMAT_B8G8R8A8_UNORM/g s/MESA_FORMAT_ARGB8888_REV\b/MESA_FORMAT_A8R8G8B8_UNORM/g s/MESA_FORMAT_RGBX8888\b/MESA_FORMAT_X8B8G8R8_UNORM/g s/MESA_FORMAT_RGBX8888_REV\b/MESA_FORMAT_R8G8B8X8_UNORM/g s/MESA_FORMAT_XRGB8888\b/MESA_FORMAT_B8G8R8X8_UNORM/g s/MESA_FORMAT_XRGB8888_REV\b/MESA_FORMAT_X8R8G8B8_UNORM/g
* mesa: change gl_format to mesa_formatMark Mueller2014-01-271-5/+5
| | | | s/\bgl_format\b/mesa_format/g. Use better name for Mesa Formats enum
* radeon / r200: Eliminate BEGIN_BATCH_NO_AUTOSTATEIan Romanick2014-01-231-1/+1
| | | | | | | | | | | | | | Sed job: grep -lr BEGIN_BATCH_NO_AUTOSTATE src/mesa/drivers/dri/ | while read f do cat $f | sed 's/BEGIN_BATCH_NO_AUTOSTATE/BEGIN_BATCH/g' > x mv x $f done Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Cc: Marek Olšák <[email protected]>
* radeon: Fix printf format not to warn in 64bitPauli Nieminen2012-08-011-2/+2
| | | | | | | | | When I build tested radeon changes I noticed two warnings about format size missmatch in 64bit. I decided to clean them to make relevant compiler warnings easier to spot. Signed-off-by: Pauli Nieminen <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* radeon/r200: fix bogus assert/scissor wrt width/height 2048Roland Scheidegger2012-08-011-4/+4
| | | | | | | | | This addresses one issue raised in bug #51658 discovered by Eugene St Leger. The assert is bogus since there's no problem with texture width/height being 2048 (the width/height programmed is width/height minus one). OTOH though the programmed size for scissor rect should be width/height minus one too otherwise bad things may happen (as it is inclusive, and there's not enough bits for more than a value of 2047).
* radeon: add some tiling support for r100.Dave Airlie2011-12-051-0/+11
| | | | | | | | This sets up the tiling flags on the blitter. Fixes some piglit tests with tiling enabled. Signed-off-by: Dave Airlie <[email protected]>
* radeon: texture/renderbuffer overhaul.Dave Airlie2011-12-051-8/+8
| | | | | | | | | | | | | | | This could have been split up better, but the driver is just broken now, so bisecting the brokenness is going to be painful no matter what. This adds renderbuffer mapping/unmapping along with texture image allocation. It drops all the old texture upload paths, some of which could possible be reimplemented with the blitter later. It also redoes the span code paths to use its own set of image mapping handlers, along with removing the tiling decode paths for the color buffers, since we now hope to use the blitter for this. Signed-off-by: Dave Airlie <[email protected]>
* radeon: add a bit more debugging to the blit debug code.Dave Airlie2011-12-051-4/+4
| | | | | | For debugging blits it helps if we printed out the offsets as well. Signed-off-by: Dave Airlie <[email protected]>
* radeon/r200: fix r100/r200 blit to use the offsets.Dave Airlie2011-11-041-2/+2
| | | | | | This is needed to do proper renderbuffer operation on mipmaps. Signed-off-by: Dave Airlie <[email protected]>
* Drop GLcontext typedef and use struct gl_context insteadKristian Høgsberg2010-10-131-1/+1
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* r100: add additional blit formatsAlex Deucher2010-03-101-0/+14
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* radeon/r200/r600: allow src and dst BOs to be placed in GTT during blitAlex Deucher2010-03-081-8/+2
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* radeon/r200/r600: reset bos when validating buffers during blitAlex Deucher2010-03-081-0/+3
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* radeon/r200/r300/r600: add check_blit vtbl functionAlex Deucher2010-03-031-2/+2
| | | | | | | | | Check if the native blit formats are supported, if not, attempt to use an alternate format. Skip 3, >4 bpp as per comments from mcencora on irc. Signed-off-by: Alex Deucher <[email protected]>
* radeon/r200/r300/r600: fix blit BO buffer validationDave Airlie2010-03-031-4/+8
| | | | | | | | | there is no need for these to be persistent since we flush the CS at the end of the blit, and we don't reuse these buffers at all. on my r600 the Wine DX9 test suite doesn't crash at least anymore. Signed-off-by: Dave Airlie <[email protected]>
* r100/r200: fix Y coord flipping in accelerated blitsAlex Deucher2010-01-191-6/+5
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* r100/r200: fix dst pitch in blit codeAlex Deucher2010-01-191-1/+1
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* r100/r200: align to pitch updates in blit interfaceMaciej Cencora2010-01-201-2/+2
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* r100: use common glCopyTex(Sub)Image codeMaciej Cencora2010-01-191-22/+28
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* r100/r200/r600: fix typo in 2b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher2010-01-191-1/+1
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* r100/r200/r600: check if blitting for given format is supported earlierAlex Deucher2010-01-191-1/+24
| | | | based on Maciej's r300 patch.
* r100/r200: add blit support for ARGB4444Alex Deucher2010-01-191-0/+6
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* r100: add blit supportAlex Deucher2010-01-181-0/+369
Only enabled with KMS.
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