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path: root/src/mesa/drivers/dri/intel
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* i965: Add support for GL_ARB_depth_buffer_float under 3.0 override.Eric Anholt2011-12-192-0/+6
* i965: Add separate stencil/HiZ setup for MESA_FORMAT_Z32_FLOAT_X24S8.Eric Anholt2011-12-191-14/+17
* i965: Add support for mapping Z32_FLOAT_X24S8 fake packed depth/stencil.Eric Anholt2011-12-191-5/+17
* intel: Stop creating the wrapped depth irb.Eric Anholt2011-12-192-111/+8
* i965: Properly demote the depth mt format for fake packed depth/stencil.Eric Anholt2011-12-193-3/+18
* intel: Reuse intel_miptree_match_image().Eric Anholt2011-12-191-9/+6
* intel: Stop creating the wrapped stencil irb.Eric Anholt2011-12-193-51/+22
* intel: Simplify and touch up the FBO completeness test.Eric Anholt2011-12-141-18/+21
* intel: Remove another renderbuffer allocation path.Eric Anholt2011-12-141-8/+4
* intel: Make the separate stencil RB storage path match texture more.Eric Anholt2011-12-141-76/+52
* intel: Move S8 width/height alignment to miptree creation.Eric Anholt2011-12-143-55/+22
* intel: Drop check for wrapped_depth in RB mapping.Eric Anholt2011-12-141-1/+1
* intel: Fix uninitialized values in debug output for renderbuffer mapping.Eric Anholt2011-12-141-1/+1
* mesa,intel: use _mesa_image_offset() for PBOsnobled2011-12-081-2/+3
* mesa/drivers: use new swrast renderbuffer functionsBrian Paul2011-12-083-20/+23
* mesa: rewrite accum buffer supportBrian Paul2011-12-081-1/+1
* intel: Update comment about how depth/stencil miptrees are handled.Eric Anholt2011-12-071-6/+18
* intel: Rely on miptree mapping for all renderbuffer maps.Eric Anholt2011-12-072-202/+21
* intel: Add support for LLC-cached reads of X-tiled miptrees using a blit.Eric Anholt2011-12-072-0/+83
* intel: Handle MapRenderbuffer of fake packed depth/stencil using miptree maps.Eric Anholt2011-12-071-138/+2
* intel: Track miptrees for fake packed depth/stencil renderbuffers.Eric Anholt2011-12-071-0/+10
* intel: Make the fake packed depth/stencil mappings use a cached temporary.Eric Anholt2011-12-072-121/+129
* intel: Make intel_region_map return void *.Eric Anholt2011-12-072-4/+4
* intel: Move separate-stencil s8 mapping logic to intel_miptree_map.Eric Anholt2011-12-072-113/+112
* intel: Move the gtt-particular texture mapping logic to a helper function.Eric Anholt2011-12-071-49/+71
* intel: Make mapping of texture slices track the region of interest.Eric Anholt2011-12-072-5/+51
* intel: Move the teximage mapping logic to a miptree level/slice mapping.Eric Anholt2011-12-073-48/+109
* intel: Only prefer separate stencil when we can do HiZ.Eric Anholt2011-12-071-2/+4
* mesa: rename MESA_FORMAT_RG88 to MESA_FORMAT_GR88Brian Paul2011-12-022-2/+2
* i965: Don't perform the precompile on fragment shaders by default.Eric Anholt2011-11-301-1/+5
* i965: Base HW depth format setup based on MESA_FORMAT, not bpp.Eric Anholt2011-11-291-1/+0
* i915: Move the texture format setup for this driver out of shared code.Eric Anholt2011-11-222-42/+3
* i965: Drop intel_context.c's texture format set up for this driver.Eric Anholt2011-11-221-87/+0
* intel: Improve debug output for begin/finish render texture.Eric Anholt2011-11-221-4/+4
* intel: Remove duplicate test for texture attachment completeness.Eric Anholt2011-11-221-8/+0
* i965: Don't require spans (swrast) support to consider a format FBO complete.Eric Anholt2011-11-221-3/+10
* intel: Add the context to the render_target_supported() vtbl method.Eric Anholt2011-11-222-2/+3
* i965/gen6: Enable HiZ by defaultChad Versace2011-11-221-6/+2
* intel: Use separate stencil whenever possibleChad Versace2011-11-222-2/+2
* i965: Implement the actual tables for texture alignment units [v2]Kenneth Graunke2011-11-223-13/+105
* intel: Store miptree alignment units in the miptreeChad Versace2011-11-223-14/+18
* intel: Enable HiZ for texture renderbuffersChad Versace2011-11-221-0/+7
* intel: Resolve buffers in intel_map_renderbuffer()Chad Versace2011-11-221-0/+5
* intel: Resolve buffers in intel_map_texture_image()Chad Versace2011-11-221-0/+5
* intel: Mark needed resolves when first enabling HiZ on a miptreeChad Versace2011-11-221-1/+20
* intel: Resolve buffers in intelSpanRenderStartChad Versace2011-11-221-1/+39
* intel: Refactor intelSpanRenderStartChad Versace2011-11-221-16/+25
* intel: Add resolve functions for renderbuffersChad Versace2011-11-222-0/+94
* intel: Add resolve functions for miptreesChad Versace2011-11-222-1/+174
* intel: Add field intel_mipmap_tree::hiz_mapChad Versace2011-11-221-0/+13
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