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path: root/src/mesa/drivers/dri/intel/intel_fbo.c
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* intel: remove unused RenderToTexture fieldBrian Paul2009-01-301-2/+0
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* intel: remove unused #includesBrian Paul2009-01-291-2/+0
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* intel: formatting clean-upsBrian Paul2009-01-291-9/+16
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* intel: clean up more pf mess.Eric Anholt2009-01-271-2/+0
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* intel: add GL_EXT_framebuffer blit extensionBrian Paul2009-01-221-0/+70
| | | | | | This functionality is required by GL_ARB_framebuffer_object. For now, implement it in terms of glCopyPixels(). This will need to be revisted though.
* intel: remove/disable the "paired depth/stencil" codeBrian Paul2009-01-221-4/+0
| | | | | | We only allow combined depth+stencil renderbuffers so the complicated code for splitting and combining separate depth and stencil buffers is no longer needed.
* intel: remove unneeded call to ctx->Driver.DepthRange()Brian Paul2009-01-221-3/+0
| | | | The preceeding call to intel_draw_buffer() does that.
* i965: disallow separate depth/stencil renderbuffersBrian Paul2009-01-221-11/+11
| | | | | | | | | Take advantage of the GL_FRAMEBUFFER_UNSUPPORTED feature to disallow separate depth and stencil renderbuffers; only allow combined depth/stencil buffers. Next up: remove/simplify a bunch of the depth/stencil renderbuffer code. Also: restore the previously disabled GL_DEPTH_COMPONENT16 case
* intel: plug in stub intel_validate_framebuffer() functionBrian Paul2009-01-221-0/+14
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* intel: inline some renderbuffer functionsBrian Paul2009-01-221-43/+0
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* Remove intel pageflipping support in its entirety.Owain G. Ainsworth2009-01-201-38/+1
| | | | | | | | It's been broken and deprecated for a while, so it's time to die. This has the wonderful benefit of cleaning up the code a fair amount; making it marginally less twisty. I'm unsure if the for loops in IntelWindowMoved are still needed.
* i965: asst. fixes, work-arounds for FBOs and render to textureBrian Paul2009-01-141-0/+7
| | | | | | | | | | | | | | OpenGL allows mixing and matching depth and stencil renderbuffers in framebuffer objects while the hardware really only supports interleaved depth/stencil buffers. This makes for some tricky buffer management. An extra wrinkle is the situation where the user allocates a 16bpp depth texture or renderbuffer then tries to render to it along with a stencil buffer. We'd have to promote the 16bpp Z values to 24-bit Z values and mix in the stencil values to setup the depth/stencil renderbuffer. There's no support for that now, so always allocate 32bpp depth textures/ renderbuffers for now.
* i965: fix incorrect renderbuffer DataType assignmentBrian Paul2009-01-141-2/+6
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* intel: Fall back on rendering to a texture attachment with a border.Eric Anholt2008-12-061-1/+8
| | | | Fixes a segfault in oglconform fbo.c test.
* intel: Fix clears to depth_stencil texture attachments.Eric Anholt2008-09-241-1/+1
| | | | | | Broken by 0adfd1021035e90995a25ec5f20b736e55075d92, showed up as an assertion failure in a software fallback in the shadowtex demo when we failed to recognize the texture format.
* mesa: added "main/" prefix to includes, remove some -I paths from ↵Brian Paul2008-09-181-8/+8
| | | | Makefile.template
* intel: Add a width field to regions, and use it for making miptrees in TFP.Eric Anholt2008-09-121-1/+1
| | | | | Otherwise, we would use the pitch as width of the texture, and compiz would render the pitch padding on the right hand side.
* Revert "Revert "Merge branch 'drm-gem'""Dave Airlie2008-08-241-8/+12
| | | | This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
* Revert "Merge branch 'drm-gem'"Dave Airlie2008-08-241-12/+8
| | | | | | | | This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c
* intel: Don't return a renderbuffer with alpha when just GL_RGB is requested.Eric Anholt2008-07-261-0/+8
| | | | | Fixes oglconform rbGetterFuncs testcase. The span code for this mode hasn't actually been tested.
* intel: Add a little span cache to spead up readpixels by cutting syscalls.Eric Anholt2008-07-231-0/+3
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* intel-gem: Use pread/pwrite for span access.Eric Anholt2008-07-231-1/+0
| | | | | This will avoid clflushing entire buffers for small acesses, such as those commonly used by regression tests.
* drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.Eric Anholt2008-07-111-20/+1
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* intel-gem: Fix Y-tiling span setup.Eric Anholt2008-07-021-3/+10
| | | | | | | | | The boolean that the server gives us for whether the region is tiled was getting used as the enum for what tiling mode. Instead, guess the correct tiling in screen setup. Also, fix the Y-tiling pitch setup. The pitch to the next tile in Y is 32 scanlines, not 8.
* [intel-GEM] Add tiling support to swrast.Keith Packard2008-05-061-5/+11
| | | | | Accessing tiled surfaces without using the fence registers requires that software deal with the address swizzling itself.
* intel: fix abort issue with shadowtex demo when useXiang, Haihao2008-03-141-23/+41
| | | | DEPTH_STENCIL texture. (bug#14952).
* [intel] Allow attIndex to be negative to avoid defeating the >= 0 check.Eric Anholt2008-02-151-1/+1
| | | | | Otherwise, we would go wildly out of bounds if passed -1 (no renderbuffer), such as while doing LOCK_HARDWARE with glDrawBuffer(GL_NONE).
* [intel] Simplify intelCreateBuffer() a bit.Kristian Høgsberg2008-01-091-19/+15
| | | | | | Drop a bunch of unused arguments from intel_create_renderbuffer() and introduce intel_renderbuffer_set_region() to set the region for a renderbuffer.
* Replace gl_framebuffer's _ColorDrawBufferMask with _ColorDrawBufferIndexesBrian2008-01-061-1/+4
| | | | | | | Each array element is now a BUFFER_x token rather than a BUFFER_BIT_x bitmask. The number of active color buffers is specified by _NumColorDrawBuffers. This builds on the previous DrawBuffer changes and will help with drivers implementing GL_ARB_draw_buffers.
* [965] Enable EXT_framebuffer_object.Eric Anholt2007-12-201-1/+2
| | | | | To do so, merge the remainnig necessary code from the buffers, blit, span, and screen code to shared, and replace it with those.
* [intel] Move bufmgr back to context instead of screen, fixing glthreads.Eric Anholt2007-12-121-1/+1
| | | | | | | | Putting the bufmgr in the screen is not thread-safe since the emit_reloc changes. It also led to a significant performance hit from pthread usage for the attempted thread-safety (up to 12% of a cpu spent on refcounting protection in single-threaded 965). The motivation had been to allow multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
* [intel] Move over files that will be shared with 965-fbo work.Eric Anholt2007-11-091-0/+687
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