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path: root/src/mesa/drivers/dri/intel/intel_batchbuffer.c
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* intel: Mark some file-local code as static.Eric Anholt2012-09-271-1/+4
* intel: Move finish_batch() call before MI_BATCH_BUFFER_END and padding.Kenneth Graunke2012-08-121-3/+3
* intel: Make the length for PIPE_CONTROL explicit.Kenneth Graunke2012-08-081-8/+8
* i965: Add hardware context support.Kenneth Graunke2012-07-101-2/+7
* i965: Completely annotate the batch bo when aub dumping.Paul Berry2012-05-221-1/+4
* i965: Emit Ivybridge VS workaround flushes.Kenneth Graunke2012-02-151-2/+24
* intel: Remove num_mapped_regions assertion from _intel_batchbuffer_flushIan Romanick2012-02-071-7/+0
* intel: Use libdrm's decode functionality instead of the gpu-tools copy.Eric Anholt2012-01-301-11/+41
* i965/gen7: Use the updated interface for SO write pointer resetting.Eric Anholt2012-01-061-4/+9
* i965 Gen6+: Invalidate VF address-based cache on flushPaul Berry2011-12-231-0/+1
* i965 gen6+: Make intel_batchbuffer_emit_mi_flush() actually flush.Paul Berry2011-12-201-1/+2
* intel: Return error value from intel_batchbuffer_flush().Eric Anholt2011-10-291-4/+10
* intel: Add an interface for saving/restoring the batchbuffer state.Eric Anholt2011-10-291-0/+21
* i915: Move the always_flush_cache code to triangle emit.Eric Anholt2011-10-291-4/+0
* intel: Convert from GLboolean to 'bool' from stdbool.h.Kenneth Graunke2011-10-181-5/+5
* intel: Assert that no batch is emitted if a region is mappedChad Versace2011-10-111-0/+7
* i965: Emit depth stalls and flushes before changing depth state on Gen6+.Kenneth Graunke2011-09-261-0/+39
* Change strerror(ret) to strerror(-ret).Eugeni Dodonov2011-09-151-1/+1
* intel: fix build errorYuanhan Liu2011-09-031-1/+1
* intel: Give an explanation why we are exiting for debugging.Eugeni Dodonov2011-09-021-0/+1
* intel: Upload batchbuffer contents even if INTEL_NO_HW is set.Eric Anholt2011-09-021-8/+8
* i965: Emit texture cache flushes on gen6 along with render cache flushes.Eric Anholt2011-07-251-0/+1
* i965: Enable the PIPE_CONTROL workaround workaround out of paranoia.Eric Anholt2011-07-201-3/+28
* i965: Avoid kernel BUG_ON if we happen to wait on the pipe_control w/a BO.Eric Anholt2011-07-201-1/+1
* intel: Use the post-execution batchbuffer contents for dumping.Eric Anholt2011-07-181-1/+3
* i965/gen6: Apply documented workaround for nonpipelined state packets.Eric Anholt2011-06-201-1/+21
* i965/gen6: Limit the workaround flush to once per primitive.Eric Anholt2011-06-201-0/+5
* i965/gen6: Use an BO instead of writing to address 0 for PIPE_CONTROL W/A.Eric Anholt2011-06-201-1/+19
* i965/gen6: Factor the PIPE_CONTROL workaround to a separate function.Eric Anholt2011-06-201-8/+21
* intel: Implement glFinish() correctly by waiting on all previous rendering.Eric Anholt2011-06-071-3/+6
* Revert "intel: use throttle ioctl for throttling"Eric Anholt2011-04-271-0/+5
* intel: Remove the unrelaxed relocation assertionChris Wilson2011-03-301-4/+0
* intel: use throttle ioctl for throttlingChris Wilson2011-02-211-5/+0
* i965: Move repeat-instruction-suppression to batchbuffer coreChris Wilson2011-02-211-2/+66
* intel: use pwrite for batchChris Wilson2011-02-211-108/+58
* intel: Buffered uploadChris Wilson2011-02-211-5/+2
* intel: Pack dynamic draws togetherChris Wilson2011-02-211-0/+6
* i965: Use MI_FLUSH_DW for blt ring flush on sandybridgeZhenyu Wang2010-12-231-2/+5
* i965: Add support for using the BLT ring on gen6.Eric Anholt2010-12-131-20/+35
* intel: Add an env var override to execute for a different GPU revision.Eric Anholt2010-12-041-1/+1
* intel: Annotate debug printout checks with unlikely().Eric Anholt2010-11-031-3/+3
* intel: For batch, use GTT mapping instead of writing to a malloc and copying.Eric Anholt2010-11-021-11/+9
* i965: sandybridge pipe control workaround before write cache flushZhenyu Wang2010-09-281-1/+9
* intel: Update intel_decode.c from intel-gpu-tools.Eric Anholt2010-07-081-1/+1
* i965: Add support for streaming indirect state rather than caching objects.Eric Anholt2010-06-111-0/+7
* intel: Convert remaining dri_bo_emit_reloc to drm_intel_bo_emit_reloc.Eric Anholt2010-06-081-2/+3
* intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt2010-06-081-12/+14
* intel: Clean up stale comments in intel_batchbuffer.c.Eric Anholt2010-06-081-4/+1
* intel: Remove the non-gem paths for batchbuffer upload.Eric Anholt2010-06-081-22/+4
* intel: Initialize batch->reserved_space on allocationChris Wilson2010-05-311-2/+1
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