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path: root/src/mesa/drivers/dri/i965
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* i965: Define GEN_GE/GEN_LE macros in terms of GEN_LT.Matt Turner2016-05-031-2/+3
* i965: Add disassembler support for remaining opcodes.Matt Turner2016-05-032-18/+92
* i965: Make opcode_descs and gen_from_devinfo() static.Matt Turner2016-05-032-6/+2
* i965: Actually check whether the opcode is supported.Matt Turner2016-05-032-4/+3
* i965: Merge inst_info and opcode_desc tables.Matt Turner2016-05-035-149/+73
* i965: Move inst_info from brw_eu_validate.c to brw_eu.c.Matt Turner2016-05-033-245/+249
* i965/disasm: Wrap opcode_desc look-up in a function.Francisco Jerez2016-05-035-14/+42
* i965: Pass devinfo pointer to is_3src() helpers.Francisco Jerez2016-05-038-10/+11
* i965: Pass devinfo pointer to brw_instruction_name().Francisco Jerez2016-05-034-4/+5
* i965: Write a scalar TCS backend that runs in SINGLE_PATCH mode.Kenneth Graunke2016-05-037-15/+510
* i965: Rework the TCS passthrough shader to use NIR.Kenneth Graunke2016-05-033-56/+85
* i965: don't forget to ship brw_nir_trig_workarounds.pyEmil Velikov2016-05-011-0/+3
* nir: Switch the arguments to nir_foreach_use and friendsJason Ekstrand2016-04-281-1/+1
* nir: Switch the arguments to nir_foreach_functionJason Ekstrand2016-04-286-13/+13
* nir: Switch the arguments to nir_foreach_instrJason Ekstrand2016-04-286-11/+11
* i965/nir: fixup for new foreach_block()Connor Abbott2016-04-286-80/+69
* nir: rename lower_flrp to lower_flrp32Samuel Iglesias Gonsálvez2016-04-281-1/+1
* i965/blorp/gen8: Fix blitting of interleaved msaa surfacesTopi Pohjolainen2016-04-271-2/+16
* i965: Enable ARB_texture_stencil8 and OES_texture_stencil8 on Gen8+.Kenneth Graunke2016-04-263-7/+2
* i965: Fix MapTextureImage for multi-slice/level stencil buffers.Kenneth Graunke2016-04-261-2/+2
* i965: Move TCS output indirect_offset.file check out a level.Kenneth Graunke2016-04-261-42/+46
* i965/fs: Reduce the response length of sampler messages on Skylake.Kenneth Graunke2016-04-264-5/+28
* i965/fs: Use inst->regs_written for rlen for texture instructionsJason Ekstrand2016-04-262-9/+3
* i965/fs: Properly report regs_written from SAMPLEINFOJason Ekstrand2016-04-262-2/+9
* i965/blorp: Set regs_written on texturing instructionsJason Ekstrand2016-04-261-0/+1
* i965: Don't force a header for texture offsets of 0.Kenneth Graunke2016-04-261-1/+3
* i965/blorp: Convert state setup to CJason Ekstrand2016-04-264-4/+3
* i965/blorp: Make state setup C-safeJason Ekstrand2016-04-263-4/+4
* i965/blorp: Convert brw_blorp.cpp to a C fileJason Ekstrand2016-04-262-5/+2
* i965/blorp: Make all of brw_blorp.h accessible to CJason Ekstrand2016-04-261-9/+8
* i965/blorp: Turn brw_blorp_params into a C-style structJason Ekstrand2016-04-267-80/+71
* i965/blorp: Turn coord_transform into a C-style structJason Ekstrand2016-04-262-17/+16
* i965/blorp: Turn blorp_surface_info into a C-style structJason Ekstrand2016-04-267-69/+69
* i965/blorp: Roll mip_info into surface_infoJason Ekstrand2016-04-262-37/+17
* i965/blorp: Get rid of the blorp_blit_params classJason Ekstrand2016-04-262-167/+131
* i965/blorp: Remove the hiz params classJason Ekstrand2016-04-262-37/+42
* i965/blorp: Remove the clear params classesJason Ekstrand2016-04-261-132/+83
* i965/blorp: Remove the arguments to brw_blorp_params()Jason Ekstrand2016-04-262-9/+5
* i965/blorp: Refactor to get rid of the get_wm_prog virtual functionJason Ekstrand2016-04-267-97/+58
* i965/meta: initialize values to avoid random behaviour on error pathJuha-Pekka Heikkila2016-04-261-1/+1
* mesa: Remove every double semi-colonJakob Sinclair2016-04-261-1/+1
* i965: Unroll SIMD16 DDY_FINE on Sandybridge.Kenneth Graunke2016-04-251-1/+5
* i965: Mark URB reads as volatile.Kenneth Graunke2016-04-251-0/+3
* i965: Make a few tessellation related functions non-static.Kenneth Graunke2016-04-253-47/+51
* i965/tex_image: Flush certain subnormal ASTC channel valuesNanley Chery2016-04-231-0/+87
* i965/blorp: Enable for buffer resolvesTopi Pohjolainen2016-04-231-1/+1
* i965/blorp: Enable for normal color clearsTopi Pohjolainen2016-04-231-0/+9
* i965/blorp: Fix clear code for ignoring colormask for XRGB formats on Gen9+Topi Pohjolainen2016-04-231-7/+26
* i965/blorp: Do not trigger re-emission of base state addressTopi Pohjolainen2016-04-232-2/+0
* i965/blorp: Reconfigure base state address only if neededTopi Pohjolainen2016-04-233-3/+7
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