mesa.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	i965/blorp: wrap MOV (/brw_MOV(&func, /emit_mov(/)	Topi Pohjolainen	2014-01-23	2	-35/+45
*	i965/blorp: wrap emission of if-equal-assignment	Topi Pohjolainen	2014-01-23	2	-24/+12
*	i965/blorp: wrap emission of conditional assignment	Topi Pohjolainen	2014-01-23	2	-15/+15
*	i965/blorp: move emission of sample combining into eu-emitter	Topi Pohjolainen	2014-01-23	3	-9/+24
*	i965/blorp: move emission of rt-write into eu-emitter	Topi Pohjolainen	2014-01-23	3	-10/+28
*	i965/blorp: move emission of texture lookup into eu-emitter	Topi Pohjolainen	2014-01-23	3	-22/+60
*	i965/fs: introduce non-compressed equivalent of tex_cms	Topi Pohjolainen	2014-01-23	4	-0/+13
*	i965: rename tex_ms to tex_cms	Topi Pohjolainen	2014-01-23	10	-17/+17
*	i965/blorp: move emission of pixel kill into eu-emitter	Topi Pohjolainen	2014-01-23	3	-25/+38
*	i965/blorp: introduce separate eu-emitter for blit compiler	Topi Pohjolainen	2014-01-23	4	-38/+113
*	i965: Support 32 texture image units on Haswell+.	Kenneth Graunke	2014-01-22	2	-4/+7
*	i965/fs: Switch from BRW_MAX_TEX_UNIT to the actual limit.	Kenneth Graunke	2014-01-22	1	-1/+2
*	i965/vec4: Support arbitrarily large sampler state indices on Haswell+.	Kenneth Graunke	2014-01-22	2	-3/+26
*	i965/vec4: Refactor sampler message setup.	Kenneth Graunke	2014-01-22	1	-17/+22
*	i965/vec4: Don't set header_present if texel offsets are all 0.	Kenneth Graunke	2014-01-22	1	-9/+8
*	i965/fs: Support arbitrarily large sampler state indices on Haswell+.	Kenneth Graunke	2014-01-22	2	-2/+22
*	i965/fs: Plumb sampler index into emit_texture_gen7.	Kenneth Graunke	2014-01-22	3	-4/+4
*	i965/fs: Refactor sampler message header to duplicate less code.	Kenneth Graunke	2014-01-22	1	-25/+21
*	i965: Use get_element_ud to shorten texture header access.	Kenneth Graunke	2014-01-22	1	-2/+1
*	intel: Fix initial MakeCurrent for single-buffer drawables	Kristian Høgsberg	2014-01-22	1	-6/+4
*	i965/blorp: use BRW_COMPRESSION_2NDHALF for second half LPR	Topi Pohjolainen	2014-01-22	2	-28/+42
*	i965/blorp: patch jump counters also for endif	Topi Pohjolainen	2014-01-22	2	-3/+5
*	i965: Fix comments to refer to the new ctx->Shader.CurrentProgram array.	Paul Berry	2014-01-21	3	-6/+6
*	mesa: Fold long lines introduced by the previous patch.	Paul Berry	2014-01-21	4	-8/+14
*	mesa: Replace ctx->Shader.Current{Vertex,Fragment,Geometry}Program with an ar...	Paul Berry	2014-01-21	13	-19/+19
*	mesa: Replace _mesa_program_index_to_target with _mesa_shader_stage_to_program.	Paul Berry	2014-01-21	1	-1/+1
*	i965: Ignore 'centroid' interpolation qualifier in case of persample shading	Anuj Phogat	2014-01-21	1	-1/+1
*	i965: Use sample barycentric coordinates with per sample shading	Anuj Phogat	2014-01-21	4	-6/+30
*	i965: Add an option to ignore sample qualifier	Anuj Phogat	2014-01-21	3	-4/+4
*	i965/fs: Optimize LRP with x == y into a MOV.	Matt Turner	2014-01-21	1	-0/+10
*	i965: Enable AOS optimizations for the geometry shader.	Matt Turner	2014-01-21	1	-0/+1
*	mesa: rename PreferDP4 to OptimizeForAOS.	Matt Turner	2014-01-21	1	-1/+1
*	i965/fs: Print the maximum register pressure.	Matt Turner	2014-01-21	1	-1/+3
*	i965/fs: Show register pressure in dump_instructions() output.	Kenneth Graunke	2014-01-21	3	-1/+16
*	i965: Compute the number of live registers at each IP.	Kenneth Graunke	2014-01-21	3	-0/+22
*	i965/fs: Call opt_peephole_sel later in the optimization loop.	Matt Turner	2014-01-21	1	-1/+1
*	i965/fs: Calculate interference better in register_coalesce.	Matt Turner	2014-01-21	1	-7/+72
*	i965/fs: Support coalescing registers of size > 1.	Matt Turner	2014-01-21	1	-23/+59
*	i965/fs: Assert that var < num_vars.	Matt Turner	2014-01-21	1	-0/+2
*	i965/fs: Add a comment explaining how register coalescing works.	Matt Turner	2014-01-21	1	-0/+12
*	i965/fs: Add and use MAX_SAMPLER_MESSAGE_SIZE definition.	Matt Turner	2014-01-21	3	-5/+10
*	i965/fs: Fix the example about overwriting uniforms in SIMD16.	Matt Turner	2014-01-21	1	-5/+5
*	i965: Print reg_offset for vgrf of size > 1 in dump_instruction().	Matt Turner	2014-01-21	2	-4/+4
*	i965: Modify some error messages to refer to "vec4" instead of "vs".	Paul Berry	2014-01-21	2	-5/+5
*	i965: Add GS support to INTEL_DEBUG=shader_time.	Paul Berry	2014-01-21	8	-10/+37
*	i965: Reserve space for "Vertex Count" in GS outputs.	Kenneth Graunke	2014-01-21	2	-0/+13
*	i965: Update blitter code for 48-bit addresses.	Kenneth Graunke	2014-01-20	1	-16/+48
*	i965: Update PIPE_CONTROL packet lengths for Broadwell.	Kenneth Graunke	2014-01-20	1	-2/+20
*	i965: Re-combine the Gen4-5 and Gen6+ write_depth_count functions.	Kenneth Graunke	2014-01-20	3	-23/+10
*	i965: Create a helper function for emitting PIPE_CONTROL writes.	Kenneth Graunke	2014-01-20	4	-93/+69