aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965
Commit message (Expand)AuthorAgeFilesLines
* i965: Move brw_fs_cfg.* to brw_cfg.*.Eric Anholt2012-10-177-6/+6
* i965: Make the FS and VS share a few visitor/instruction fields.Eric Anholt2012-10-175-24/+30
* i965/vs: Trim the swizzle of the scratch write temporary.Eric Anholt2012-10-171-1/+16
* i965/vs: Do the temporary allocation in emit_scratch_write().Eric Anholt2012-10-173-21/+12
* i965/vs: Simplify emit_scratch_write() prototype.Eric Anholt2012-10-173-8/+6
* i965/vs: Add a little bit of IR-level debug ability.Eric Anholt2012-10-174-5/+96
* i965: Fix rendering to small mipmaps of depth/stencil buffers using a temp mt.Eric Anholt2012-10-164-121/+172
* i965: Share the draw x/y offset masking code between main/blorp and all gens.Eric Anholt2012-10-166-108/+89
* i965: Make a helper function for the renderbuffer temporary mt workaround.Eric Anholt2012-10-161-22/+1
* i965: Warn on a couple of workarounds in blending.Eric Anholt2012-10-161-2/+15
* i965/fs: Fix segfault when using INTEL_DEBUG=perf with non-GLSL.Kenneth Graunke2012-10-161-1/+1
* mesa: Remove PROGRAM_WRITE_ONLY register type.Kenneth Graunke2012-10-161-1/+0
* mesa: Remove support for named parameters.Kenneth Graunke2012-10-161-3/+1
* mesa: Remove the EmitNVTempInitialization shader compiler option.Kenneth Graunke2012-10-161-1/+0
* intel: Remove NV_vertex_program support.Eric Anholt2012-10-152-7/+0
* i965/vp: Remove more code for unused opcodes.Eric Anholt2012-10-151-55/+1
* i965/vs: Add support for splitting virtual GRFs.Eric Anholt2012-10-103-0/+62
* i965/vs: Try again when we've successfully spilled a reg.Eric Anholt2012-10-103-10/+16
* i965/vs: Implement register spilling.Kenneth Graunke2012-10-103-1/+144
* i965/vs: Fix unit mismatch in scratch base_offset parameter.Kenneth Graunke2012-10-103-4/+8
* i965: Delete some dead code from brw_eu_emit.c.Kenneth Graunke2012-10-092-120/+0
* i965/fs: Improve performance of copy/constant propagation.Eric Anholt2012-10-082-18/+30
* i965/fs: Move constant propagation to the same codebase as copy prop.Eric Anholt2012-10-083-165/+124
* i965: Remove the old ARB_fragment_program backend.Eric Anholt2012-10-089-4810/+0
* i965: Replace brw_wm_* with dumping code into the fs_visitor.Eric Anholt2012-10-0810-109/+860
* i965: Reduce maximum GL_ARB_fragment_program instruction count to 1024.Eric Anholt2012-10-081-4/+4
* i965/fs: Add a couple more algebraic cases that help some ARB_fp patterns.Eric Anholt2012-10-081-0/+23
* i965/fs: Pull ir_binop_min/ir_binop_max handling to a separate function.Eric Anholt2012-10-082-31/+23
* i965/fs: Refactor rectangle/GL_CLAMP texture coordinate adjustment.Eric Anholt2012-10-082-21/+16
* i965/fs: Pass fragment depth to the fb write as a fs_reg, not an ir_variable.Eric Anholt2012-10-082-7/+4
* dri drivers: Link dricommon before dynamic librariesMatt Turner2012-10-031-2/+2
* i965: Complain about variable index lowering when INTEL_DEBUG=perf.Kenneth Graunke2012-09-291-2/+8
* i965: Dump linked shaders on MESA_GLSL=dump.Kenneth Graunke2012-09-291-0/+9
* intel/i965: Disable SampleAlphaToOne if dual source blending enabledAnuj Phogat2012-09-291-2/+11
* i965: brwInitVtbl needs to know the chipset generationIan Romanick2012-09-282-0/+6
* i965: Don't free the intel_context structure when intelCreateContext fails.Ian Romanick2012-09-281-3/+2
* i965: Remove stale comment about rebuilding tnl_program.Eric Anholt2012-09-271-7/+0
* i965: Add a comment explaining one of the brw_draw_upload.c loops.Eric Anholt2012-09-271-0/+4
* i965: Remove broken non-interleaved-to-interleaved upload code.Eric Anholt2012-09-271-50/+2
* intel: Mark some file-local code as static.Eric Anholt2012-09-274-8/+3
* i965: Mark brw_disasm.c tables as static const.Eric Anholt2012-09-271-56/+44
* i965: Use visibility cflags on the driver code.Eric Anholt2012-09-271-0/+1
* i965/vp: Remove support for non-ARB_vp, non-NV_vp opcodes.Eric Anholt2012-09-271-86/+0
* i965/vp: Remove support for relative addressing of destination registers.Eric Anholt2012-09-271-83/+7
* i965/vp: Remove support for reading destination registers.Eric Anholt2012-09-272-64/+4
* i965/vp: Remove support for GLSL flow control from the old VS backend.Eric Anholt2012-09-271-83/+0
* i965: Do texture swizzling in hardware on Haswell.Kenneth Graunke2012-09-262-5/+52
* i965: Refactor texture swizzle generation into a helper.Kenneth Graunke2012-09-263-49/+60
* i965: Allow fast depth clears if scissoring doesn't do anything.Kenneth Graunke2012-09-251-1/+13
* i965: Don't spill "smeared" registers.Paul Berry2012-09-251-0/+15
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 11:24:26 +0000