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i965
Commit message (
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Author
Age
Files
Lines
*
intel/blorp: Take an explicit filter parameter in blorp_blit
Jason Ekstrand
2018-07-18
1
-2
/
+61
*
i965: Sweep NIR after linking phase to free held memory
Danylo Piliaiev
2018-07-18
1
-0
/
+2
*
intel/blorp: fix uninitialized variable warning
Caio Marcelo de Oliveira Filho
2018-07-18
1
-3
/
+3
*
i965/miptree: avoid uninitialized variable warnings
Caio Marcelo de Oliveira Filho
2018-07-18
1
-1
/
+2
*
i965: batchbuffer: write correct canonical offset with softpin
Lionel Landwerlin
2018-07-18
1
-1
/
+2
*
intel/batch_decoder: decoding of 3DSTATE_CONSTANT_BODY.
Sergii Romantsov
2018-07-16
1
-6
/
+6
*
i965/miptree: Allocate MS texture BOs as BUSY
Nanley Chery
2018-07-13
1
-2
/
+2
*
i965/miptree: Inline make_separate_stencil
Nanley Chery
2018-07-13
1
-23
/
+6
*
i965/miptree: Init r8stencil_needs_update to false
Nanley Chery
2018-07-13
1
-3
/
+4
*
i965/miptree: Refactor miptree_create
Nanley Chery
2018-07-13
1
-36
/
+12
*
i965/miptree: Add and use mt_surf_usage
Nanley Chery
2018-07-13
1
-13
/
+25
*
i965/miptree: Share alloc_flags in miptree_create
Nanley Chery
2018-07-13
1
-7
/
+4
*
i965/miptree: Share the miptree format in miptree_create
Nanley Chery
2018-07-13
1
-15
/
+15
*
i965/miptree: Share tiling_flags in miptree_create
Nanley Chery
2018-07-13
1
-8
/
+7
*
i965/miptree: Delete MIPTREE_CREATE_LINEAR
Nanley Chery
2018-07-13
2
-13
/
+3
*
i965/miptree: Use make_surface in map_blit
Nanley Chery
2018-07-13
1
-6
/
+6
*
i965/draw: Fix adding the stencil bo to the depth cache
Nanley Chery
2018-07-13
1
-1
/
+1
*
i965/draw: Set the r8stencil flag after drawing
Nanley Chery
2018-07-13
1
-1
/
+11
*
i965/miptree: Set the r8stencil flag in map_depthstencil
Nanley Chery
2018-07-13
1
-1
/
+3
*
i965: Set the r8stencil flag in miptree_finish_write
Nanley Chery
2018-07-13
4
-17
/
+4
*
i965/miptree: Use the correct BLT pitch
Nanley Chery
2018-07-12
1
-6
/
+6
*
i965/miptree: Drop an if case from retile_as_linear
Nanley Chery
2018-07-12
1
-4
/
+0
*
i965: Make blt_pitch public
Nanley Chery
2018-07-12
2
-10
/
+12
*
i965: fix typo (wrong gen number) in comment
Caio Marcelo de Oliveira Filho
2018-07-12
1
-1
/
+1
*
i965: Support saving the gen program with glGetProgramBinary
Jordan Justen
2018-07-09
1
-6
/
+66
*
i965: Add flag_state param to brw_search_cache
Jordan Justen
2018-07-09
12
-45
/
+35
*
mesa: Add gl_shader_program param to ProgramBinarySerializeDriverBlob
Jordan Justen
2018-07-09
3
-1
/
+12
*
i965: Add brw_populate_default_key
Jordan Justen
2018-07-09
12
-73
/
+195
*
i965: Replace brw_setup_tex_for_precompile brw with devinfo
Jordan Justen
2018-07-09
8
-9
/
+8
*
i965: Regenerate blob without gen program for shader cache
Jordan Justen
2018-07-09
1
-1
/
+63
*
i965: Add support for driver cache blob containing the gen program
Jordan Justen
2018-07-09
1
-0
/
+41
*
i965: Use brw_prog_key_set_id in disk cache load/store code
Jordan Justen
2018-07-09
1
-16
/
+8
*
i965: Add brw_prog_key_set_id helper to set the program id on any stage
Jordan Justen
2018-07-09
2
-0
/
+19
*
i965: Add brw_stage_cache_id to map gl stages to brw cache_ids
Jordan Justen
2018-07-09
2
-0
/
+17
*
i965: Add brw_(read|write)_blob_program_data functions
Jordan Justen
2018-07-09
3
-41
/
+61
*
i965: Add brw_program_deserialize_driver_blob
Jordan Justen
2018-07-09
3
-21
/
+48
*
i965: Move brw_program_*serialize_nir to brw_program_binary.c
Jordan Justen
2018-07-09
2
-37
/
+37
*
i965: Use ShaderCacheSerializeDriverBlob driver function
Jordan Justen
2018-07-09
3
-11
/
+7
*
i965/icl: Don't set float blend optimization bit in CACHE_MODE_SS
Anuj Phogat
2018-07-09
1
-4
/
+0
*
i965: fix clear color bo address relocation
Lionel Landwerlin
2018-07-07
1
-1
/
+1
*
i965: Use the new nir atomic counter linker for SPIR-V shaders
Neil Roberts
2018-07-03
1
-0
/
+2
*
i965: enable AtomicStorage capability for gen7+
Alejandro PiƱeiro
2018-07-03
1
-0
/
+1
*
i965: Fix BRW_NEW_NUM_SAMPLES to be in .brw, not .mesa
Kenneth Graunke
2018-07-02
1
-2
/
+2
*
st/mesa/i965: Allow decompressing ETC2 to GL_RGBA
Tomeu Vizoso
2018-07-02
1
-1
/
+1
*
intel/anv,blorp,i965: Implement the SKL 16x MSAA SIMD32 workaround
Jason Ekstrand
2018-06-28
1
-0
/
+17
*
intel/fs: Add fields to wm_prog_data for SIMD32 dispatch
Jason Ekstrand
2018-06-28
2
-0
/
+3
*
i965: Add plumbing for shader time in 32-wide FS dispatch mode.
Francisco Jerez
2018-06-28
3
-2
/
+11
*
intel/compiler: Add and use helpers for working with KSP indices
Jason Ekstrand
2018-06-28
2
-23
/
+47
*
i965: Re-arrange shader kernel setup in WM state
Jason Ekstrand
2018-06-28
1
-37
/
+57
*
i965/bufmgr: Use the correct argument order for bo_alloc_internal
Jason Ekstrand
2018-06-27
1
-2
/
+2
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