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path: root/src/mesa/drivers/dri/i965
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* i965/skl: Update 3DSTATE_SBE for Skylake.Damien Lespiau2014-11-032-2/+34
* i965/fs: Don't compute_to_mrf() on Gen >= 7.Matt Turner2014-11-031-0/+4
* i965/chv: Increase VS and GS thread countsBen Widawsky2014-11-021-2/+2
* Revert "i965/compaction: Disable compaction on SNB temporarily."Matt Turner2014-10-291-6/+0
* i965/vec4: Perform CSE on MAD instructions with final arguments switched.Matt Turner2014-10-291-1/+5
* i965/fs: Perform CSE on MAD instructions with final arguments switched.Matt Turner2014-10-291-1/+5
* i965: Rename brw_vec4_gs.[ch] to brw_gs.[ch].Kenneth Graunke2014-10-295-5/+4
* i965: Rename brw_gs{,_emit}.[ch] to brw_ff_gs{,_emit}.[ch].Kenneth Graunke2014-10-295-5/+5
* i965: Rename intel_bufferobj_* functions to match GL and DD hooks.Kenneth Graunke2014-10-291-65/+64
* i965/fs: Don't set dependency hints on instructions with spilled destinationsJason Ekstrand2014-10-271-0/+8
* i965/fs: Make scratch write instructions use the correct execution sizeJason Ekstrand2014-10-271-1/+1
* i965/fs: Use correct spill offsetsJason Ekstrand2014-10-271-6/+5
* i965: Use the spill destination for the message header on GEN >= 7Jason Ekstrand2014-10-271-6/+13
* i965/fs: Don't [un]spill multiple registers at a time in SIMD8 modeJason Ekstrand2014-10-271-2/+4
* i965/fs: Use instruction execution sizes when generating scratch reads/writesJason Ekstrand2014-10-271-4/+4
* i965: Skip recalculating URB allocations if the entry size didn't change.Eric Anholt2014-10-244-5/+19
* i965: Silence unused parameter warning in brw_dump_irIan Romanick2014-10-245-7/+5
* i965: Remove brwIsProgramNativeIan Romanick2014-10-241-9/+0
* i965: Remove brw_new_shader_programIan Romanick2014-10-243-13/+0
* i965/fs: Compute q-values for register allocation manuallyJason Ekstrand2014-10-241-2/+56
* i965/fs: Don't interfere with too many base registersJason Ekstrand2014-10-241-2/+2
* i965/fs: Properly precolor payload registers on GEN5 in SIMD16Jason Ekstrand2014-10-241-1/+10
* i965/fs: Add another use of MAX_VGRF_SIZEJason Ekstrand2014-10-241-1/+1
* i965: Silence unused variable warning.Matt Turner2014-10-231-2/+1
* i965/fs: Silence uninitialized variable warning.Matt Turner2014-10-231-0/+1
* i965/vec4: Generate better code for ir_triop_csel.Kenneth Graunke2014-10-211-3/+15
* i965/vec4: Simplify visit(ir_expression *)'s result_src/dst setup.Kenneth Graunke2014-10-211-13/+6
* i965/vec4: Delete some dead code in visit(ir_expression *).Kenneth Graunke2014-10-211-8/+0
* i965/fs: Generate better code for ir_triop_csel.Kenneth Graunke2014-10-211-5/+13
* i965/fs: Change the type of booleans to UD and emit correct immediatesJason Ekstrand2014-10-173-16/+16
* i965/fs: Don't pass ir_variable * to emit_sampleid_setup().Kenneth Graunke2014-10-173-4/+4
* mesa: Drop the "target" parameter from NewBufferObject().Kenneth Graunke2014-10-161-2/+2
* i965: Flag BRW_ATOMIC_COUNTER_BUFFER when a possible ABO is respecifiedChris Forbes2014-10-161-0/+2
* i965/disasm: Add missing message type for Gen7 DP untyped surface readChris Forbes2014-10-161-0/+1
* i965: Correctly use ABO count to trigger flagging of new surfaces.Chris Forbes2014-10-161-1/+1
* i965: No longer reemit textures on BRW_NEW_UNIFORM_BUFFERChris Forbes2014-10-161-2/+1
* i965: Dirty state in BO reallocation based on usage historyChris Forbes2014-10-161-1/+4
* i965: Have mesa flag BRW_NEW_TEXTURE_BUFFER when a TexBO binding changesChris Forbes2014-10-161-0/+1
* i965: Add new dirty flag for new TexBOs.Chris Forbes2014-10-163-0/+4
* i965/fs: don't make a fake ir_texture in the Mesa IR frontendConnor Abbott2014-10-151-14/+5
* i965/fs: Refactor the texture emission logic into a single function.Kenneth Graunke2014-10-153-104/+144
* i965/fs: Make gather_channel() not use ir_texture.Connor Abbott2014-10-152-5/+4
* i965/fs: Make swizzle_result() not use ir_texture.Connor Abbott2014-10-153-8/+9
* i965/fs: fix integer textures with swizzlesConnor Abbott2014-10-151-0/+1
* i965/fs: don't pass in ir_texture to emit_texture_*Connor Abbott2014-10-153-24/+23
* i965/fs: don't use ir->type in emit_texture_gen4()Connor Abbott2014-10-151-4/+1
* i965/fs: Don't use ir->lod_info.grad.dPd<x,y> in emit_texture_*.Connor Abbott2014-10-153-18/+31
* i965/fs: Don't use ir->coordinate in emit_texture_*.Connor Abbott2014-10-153-31/+39
* i965/fs: make rescale_texcoord() not use ir_texture.Connor Abbott2014-10-153-8/+8
* i965/fs: Make emit_mcs_fetch() not use ir_texture.Connor Abbott2014-10-152-4/+4
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