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path: root/src/mesa/drivers/dri/i965
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* i965/fs: Add empirically-determined instruction latencies for gen7.Eric Anholt2012-12-141-3/+179
* i965/fs: Fix the clock increment in scheduling.Eric Anholt2012-12-141-3/+15
* i965/fs: Move the old gen4 bspec-based scheduling info to a helper func.Eric Anholt2012-12-141-33/+41
* i965/fs: Set up gen7 UBO loads as sends from GRFs.Eric Anholt2012-12-145-7/+114
* i965/fs: Before reg alloc, schedule instructions to reduce live ranges.Eric Anholt2012-12-141-6/+41
* i965/fs: Add some optional debug printfs to scheduling.Eric Anholt2012-12-141-0/+21
* i965/fs: Schedule instructions both before and after register allocation.Eric Anholt2012-12-143-18/+78
* i965: Make sure that the shader_time report at context destroy happens.Eric Anholt2012-12-141-0/+3
* i965: Print a total time for the different shader stages.Eric Anholt2012-12-141-10/+38
* i965: Scale shader_time to compensate for resets.Eric Anholt2012-12-144-9/+83
* i965: Adjust the split between shader_time_end() and shader_time_write().Eric Anholt2012-12-144-51/+55
* i965: Fix disassembly of jump targets on Gen7.Kenneth Graunke2012-12-121-4/+9
* i965: Make try_rewrite_rhs_to_dst compare VGRF size to regs written.Kenneth Graunke2012-12-121-1/+1
* i965/fs: Improve performance of shaders that start out with a discard.Eric Anholt2012-12-116-7/+148
* i965/fs: Rewrite discards to use a flag subreg to track discarded pixels.Eric Anholt2012-12-118-73/+46
* i965/fs: Add an instruction flag for choosing the flag subregister.Eric Anholt2012-12-116-13/+42
* i965: Let brw_flag_reg() choose the flag reg and subreg.Eric Anholt2012-12-114-7/+7
* i965: Print the flag reg updated by conditional modifiers.Eric Anholt2012-12-111-1/+15
* i965: Add the new flag_reg_nr instruction field from IVB.Eric Anholt2012-12-112-5/+9
* i965: Correct the name and usage of the flag subregister number field.Eric Anholt2012-12-114-15/+15
* i965: Remove bogus flag_reg_nr field from bits3.Eric Anholt2012-12-111-4/+2
* i965: Add missing _NEW_BUFFERS dirty bit in Gen7 SBE state.Kenneth Graunke2012-12-081-1/+2
* intel: Enable ETC2 support on intel hardwareAnuj Phogat2012-12-071-0/+15
* i965: Add a debug flag for counting cycles spent in each compiled shader.Eric Anholt2012-12-0515-9/+517
* i965: Add a flag for instructions with normal writemasking disabled.Eric Anholt2012-12-054-0/+4
* i965/fs: Add support for uniform array access with a variable index.Eric Anholt2012-12-044-24/+216
* i965/fs: Conditionalize constant-index UBO load code and add comments.Eric Anholt2012-12-041-28/+33
* i965/fs: Restrict optimization that would fail for gen7's SENDs from GRFsEric Anholt2012-12-043-8/+28
* i965/fs: Allow source mods on gen7+ math.Eric Anholt2012-12-041-1/+1
* i965/fs: Add instruction emit for varying-index reads of uniforms.Eric Anholt2012-12-044-0/+105
* i965/fs: Rename the existing pull constant load opcode.Eric Anholt2012-12-046-14/+16
* i965: Add a header_present flag for setting up dp read messages.Eric Anholt2012-12-043-1/+7
* i965/gen7: Add some safety checks for send messages from GRFs.Eric Anholt2012-12-041-0/+15
* i965: Include codegen time in the INTEL_DEBUG=perf stall detection.Eric Anholt2012-12-032-12/+18
* i965: Don't leak the IR annotation into later instructions.Eric Anholt2012-12-032-0/+2
* i965/vp: Fix crashes with INTEL_DEBUG=vs.Eric Anholt2012-12-031-0/+1
* i965/vs: Fix uninitialized shader pointer used in debug output.Eric Anholt2012-12-031-0/+2
* i965/fs: Add fs_reg::is_zero() and is_one(); use for opt_algebraic().Kenneth Graunke2012-11-302-7/+24
* i965/fp: Fix segfault on gen4 TXB instructions.Eric Anholt2012-11-291-0/+2
* mesa: Rename API_OPENGL to API_OPENGL_COMPAT.Paul Berry2012-11-291-1/+1
* i965/vs: Move struct brw_compile (p) entirely inside vec4_generator.Kenneth Graunke2012-11-283-4/+3
* i965/vs: Split final assembly code generation out of vec4_visitor.Kenneth Graunke2012-11-284-53/+106
* i965/vs: Abort on unsupported opcodes rather than failing.Kenneth Graunke2012-11-281-3/+4
* i965/vs: Move uses of brw_compile from do_vs_prog to brw_vs_emit.Kenneth Graunke2012-11-283-14/+19
* i965/vs: Rework memory contexts for shader compilation data.Kenneth Graunke2012-11-285-8/+12
* i965/vs: Pass the brw_context pointer into brw_compute_vue_map().Kenneth Graunke2012-11-281-3/+2
* i965/vs: Pass the brw_context pointer into vec4_visitor and do_vs_prog.Kenneth Graunke2012-11-285-9/+14
* i965/vs: Move some functions from brw_vec4_emit.cpp to brw_vec4.cpp.Kenneth Graunke2012-11-282-263/+265
* i965/gen4-5: Fix segfaults with stencil-only depth/stencil setups.Eric Anholt2012-11-281-1/+3
* i965/fs: Don't generate saturates over existing variable values.Eric Anholt2012-11-281-0/+1
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