mesa.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	i965: Add a test for the EU assembly validator.	Matt Turner	2017-01-20	2	-0/+176
*	i965: Add a CHECK macro to call more complicated validation funcs.	Matt Turner	2017-01-20	1	-0/+9
*	i965: Make ERROR_IF usable from other functions.	Matt Turner	2017-01-20	1	-1/+1
*	i965: Mark error annotation on correct SIMD16 inst.	Matt Turner	2017-01-20	1	-2/+2
*	i965/vec4: Use UW-typed operands when dest is UW.	Matt Turner	2017-01-20	1	-4/+6
*	i965: Use W-typed immediate in brw_F32TO16().	Matt Turner	2017-01-20	1	-1/+1
*	i965: Don't change F->VF if dest type is DF.	Matt Turner	2017-01-20	1	-1/+2
*	i965: Remove unnecessary mt->compressed checks	Anuj Phogat	2017-01-19	1	-12/+4
*	i965: Fix indentation in brw_miptree_layout_2d()	Anuj Phogat	2017-01-19	1	-3/+2
*	i965: Fix comment to include 3d textures	Anuj Phogat	2017-01-19	1	-1/+2
*	i965: Delete pending CCS and HiZ ops in intel_miptree_make_shareable()	Chad Versace	2017-01-19	1	-0/+16
*	mesa/glsl/i965: set and use tcs vertices_out directly	Timothy Arceri	2017-01-19	1	-4/+2
*	i965: get outputs_written from gl_program	Timothy Arceri	2017-01-19	1	-2/+2
*	i965/blorp: Make post draw flush more explicit	Topi Pohjolainen	2017-01-18	2	-5/+22
*	i965/gen6: Issue direct depth stall and flush after depth clear	Topi Pohjolainen	2017-01-18	1	-1/+6
*	i965: Make depth clear flushing more explicit	Topi Pohjolainen	2017-01-18	2	-8/+57
*	i965/blorp: Use the render cache mechanism instead of explicit flushing	Topi Pohjolainen	2017-01-18	1	-1/+7
*	i965: Make brw_cache_item structure private to brw_program_cache.c.	Kenneth Graunke	2017-01-18	2	-19/+21
*	i965: Fix SURFACE_STATE to handle non-zero aux offsets	Ben Widawsky	2017-01-18	1	-2/+1
*	i965: Don't map/unmap in brw_print_program_cache on LLC platforms.	Kenneth Graunke	2017-01-17	1	-2/+4
*	i965: Move program cache printing to brw_program_cache.c.	Kenneth Graunke	2017-01-17	3	-57/+49
*	i965: Make a helper for finding an existing shader variant.	Kenneth Graunke	2017-01-17	7	-85/+68
*	i965: Make DCE set null destinations on messages with side effects.	Kenneth Graunke	2017-01-17	1	-13/+41
*	i965: Combine some dead code elimination NOP'ing code.	Kenneth Graunke	2017-01-17	1	-8/+1
*	i965: Make DCE explicitly not eliminate any control flow instructions.	Kenneth Graunke	2017-01-17	1	-3/+2
*	i965: Make BLORP disable the NP Z PMA stall fix.	Kenneth Graunke	2017-01-16	1	-0/+4
*	i965: Enable OpenGL 4.5 on Haswell.	Kenneth Graunke	2017-01-16	2	-2/+2
*	i965: Use align1 mode for barrier messages.	Kenneth Graunke	2017-01-15	1	-0/+3
*	i965: Move Gen4-5 interpolation stuff to brw_wm_prog_data.	Kenneth Graunke	2017-01-13	11	-70/+52
*	i965/vec4: Fix mapping attributes	Juan A. Suarez Romero	2017-01-13	2	-23/+11
*	i965: Fix textureGather with RG32I/UI on Gen7.	Kenneth Graunke	2017-01-13	2	-8/+37
*	nir/i965: assert first is always less than 64	Juan A. Suarez Romero	2017-01-12	1	-0/+1
*	i965/gen7: expose OpenGL 4.2 on Haswell when supported	Juan A. Suarez Romero	2017-01-12	2	-2/+2
*	i965: enable ARB_shader_precision to HSW+	Samuel Iglesias Gonsálvez	2017-01-12	1	-1/+1
*	i965: unify the code to enable of ARB_gpu_shader_fp64 and ARB_vertex_attrib_6...	Samuel Iglesias Gonsálvez	2017-01-12	1	-7/+2
*	i965: Enable ARB_vertex_attrib_64bit for Haswell	Alejandro Piñeiro	2017-01-12	1	-1/+3
*	i965: check for dual slot attributes on any gen	Juan A. Suarez Romero	2017-01-12	1	-2/+1
*	i965/vec4: emit correctly load_inputs for 64bit data	Juan A. Suarez Romero	2017-01-12	1	-6/+15
*	i965/vec4: take into account doubles when creating attribute mapping	Alejandro Piñeiro	2017-01-12	1	-4/+9
*	i965/vec4/nir: vec4 also needs to remap vs attributes	Alejandro Piñeiro	2017-01-12	1	-10/+22
*	i965/vec4: use attribute slots for first non payload GRF	Alejandro Piñeiro	2017-01-12	1	-1/+1
*	i965: downsize 64PASSTHRU formats to equivalent 32FLOAT formats on gen < 8	Alejandro Piñeiro	2017-01-12	1	-30/+139
*	i965: return PASSTHRU surface types also on gen7	Alejandro Piñeiro	2017-01-12	1	-2/+6
*	i965: Enable predicate support on gen >= 8.	Rafael Antognolli	2017-01-11	1	-1/+1
*	i965: Use the nir_move_comparisons pass.	Kenneth Graunke	2017-01-12	1	-0/+1
*	i965: Move nir_lower_locals_to_regs a bit later.	Kenneth Graunke	2017-01-12	1	-2/+2
*	compiler: Merge shader_info's tcs and tes structs.	Kenneth Graunke	2017-01-10	5	-20/+22
*	i965: Fix number of slots in SSO mode when there are no user varyings.	Kenneth Graunke	2017-01-09	1	-4/+2
*	nir/i965: use two slots from inputs_read for dvec3/dvec4 vertex input attributes	Juan A. Suarez Romero	2017-01-09	6	-29/+16
*	i965: call intel_prepare_render always when reading pixels	Tapani Pälli	2017-01-09	1	-6/+6