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path: root/src/mesa/drivers/dri/i965
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* i965: use strtol to convert the integer deviceID overrideEmil Velikov2017-08-031-1/+1
* i965: Resolve framebuffers before signaling the fenceChris Wilson2017-08-031-0/+32
* i965: perf: flush batchbuffers at the beginning of queriesLionel Landwerlin2017-08-031-0/+8
* i965: Always set AALINEDISTANCE_TRUE on Sandybridge.Kenneth Graunke2017-07-081-2/+1
* i965: Use true AA line distance on G45/Ironlake.Kenneth Graunke2017-07-081-1/+1
* i965: update MaxTextureRectSize to match PRMs and comply with OpenGL 4.1+Iago Toral Quiroga2017-06-281-1/+1
* i965: Clamp clear colors to the representable rangeJason Ekstrand2017-06-281-0/+40
* i965: Ignore anisotropic filtering in nearest mode.Kenneth Graunke2017-06-281-2/+4
* i965/gen4: Set depth offset when there is stencil attachment onlyTopi Pohjolainen2017-06-281-0/+6
* i965: Set step_rate = 0 for interleaved vertex buffersJason Ekstrand2017-06-281-0/+1
* i965: Disable the interleaved vertex optimization when instancingJason Ekstrand2017-06-281-5/+6
* i965: Do an end-of-pipe sync after flushesJason Ekstrand2017-06-281-3/+3
* i965/blorp: Do an end-of-pipe sync around CCS opsJason Ekstrand2017-06-281-12/+4
* i965: Do an end-of-pipe sync prior to STATE_BASE_ADDRESSJason Ekstrand2017-06-281-6/+12
* i965: Add an end-of-pipe sync helperTopi Pohjolainen2017-06-282-1/+100
* i965: Unify the two emit_pipe_control functionsJason Ekstrand2017-06-281-73/+64
* i965: Take a uint64_t immediate in emit_pipe_control_writeJason Ekstrand2017-06-285-18/+15
* i965: Flush around state base addressJason Ekstrand2017-06-282-1/+33
* i965: Mark depth surfaces as needing a HiZ resolve after blittingJason Ekstrand2017-06-141-0/+2
* i965: Perform HiZ flush/stall prior to HiZ resolvesJason Ekstrand2017-06-141-13/+26
* i965: Move the pre-depth-clear flush/stalls to intel_hiz_execJason Ekstrand2017-06-142-56/+58
* i965/blorp: Take a layer range in intel_hiz_execJason Ekstrand2017-06-145-18/+16
* i965/dri: Fix bad GL error in intel_create_winsys_renderbuffer()Chad Versace2017-06-141-5/+1
* i965: Rework Sandy Bridge HiZ and stencil layoutsJason Ekstrand2017-06-025-29/+134
* i965: Round copy size to the nearest block in intel_miptree_copyJason Ekstrand2017-06-011-2/+2
* i965/blorp: Do and end-of-pipe sync on both sides of fast-clear opsJason Ekstrand2017-06-011-18/+38
* i965/formats: Update the three-channel DXT1 mappingsNanley Chery2017-05-192-14/+5
* i915: Fix build break with empty unreachable()Daniel Stone2017-05-101-4/+2
* i965: Don't try to unmap NULL program cache BO.Kenneth Graunke2017-05-081-4/+7
* i965: Set modifier for imported and duplicated imagesDaniel Stone2017-05-081-0/+20
* i965: Use helper function for modifier -> tilingDaniel Stone2017-05-081-17/+34
* i965: Solve Android native fence fd double closeRandy Xu2017-05-051-1/+1
* i965/drm: Delete NULL check in brw_bo_unmap().Kenneth Graunke2017-04-161-3/+0
* i965/drm: Remove dead return in brw_bo_busy()Kenneth Graunke2017-04-161-3/+1
* i965: enable OpenGL 4.2 in IvybridgeJuan A. Suarez Romero2017-04-142-2/+2
* i965: enable ARB_shader_precision in gen7+Samuel Iglesias Gonsálvez2017-04-141-1/+1
* i965: enable ARB_vertex_attrib_64bit for gen7+Juan A. Suarez Romero2017-04-141-1/+1
* i965: enable OpenGL 4.0 to Ivybridge/BaytrailSamuel Iglesias Gonsálvez2017-04-142-5/+6
* i965: enable ARB_gpu_shader_fp64 for Ivybridge/BaytrailSamuel Iglesias Gonsálvez2017-04-141-1/+1
* i965: add missing ir_unop_*/ir_binop_* in visit_leave()Samuel Pitoiset2017-04-131-0/+3
* i965/drm: Use bools for a few flags.Kenneth Graunke2017-04-111-2/+2
* i965/drm: Make brw_bo_alloc_tiled flags parameter 32-bit.Kenneth Graunke2017-04-113-4/+4
* i965/drm: Make BO size a uint64_t rather than unsigned long.Kenneth Graunke2017-04-112-11/+11
* i965/drm: Make alignment parameter a uint64_t.Kenneth Graunke2017-04-112-4/+4
* i965/drm: Make stride/pitch a uint32_t.Kenneth Graunke2017-04-114-31/+18
* i965/drm: Fix types for pwrite/pread fields.Kenneth Graunke2017-04-112-14/+14
* i965/drm: Make brw_bo_alloc_tiled take tiling by value, not pointer.Kenneth Graunke2017-04-114-62/+41
* i965: Set kernel features before computing max GL version.Kenneth Graunke2017-04-111-24/+24
* i965: Fix wonky indentation left by brw_bo_alloc_tiled rename.Kenneth Graunke2017-04-102-18/+17
* i965/drm: Add stall warnings when mapping or waiting on BOs.Kenneth Graunke2017-04-1017-55/+68
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