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path: root/src/mesa/drivers/dri/i965/intel_batchbuffer.c
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* i965/state: Don't use brw->state.dirty.brwJordan Justen2015-03-311-2/+2
* i965: Defer the throttle until we submit new commandsChris Wilson2015-03-181-0/+44
* i965: Throttle to the previous frameChris Wilson2015-03-181-3/+4
* i965: Rename some PIPE_CONTROL flagsBen Widawsky2015-03-021-4/+4
* i965: Remove hand-rolled memcpy implementation.Matt Turner2015-03-021-1/+1
* i965: Do Sandybridge workaround flushes before each primitive.Kenneth Graunke2015-02-171-12/+0
* i965: Fix up too-wide commentKristian Høgsberg2015-01-161-4/+3
* i965: Implement WaCsStallAtEveryFourthPipecontrol on IVB/BYT.Kenneth Graunke2015-01-041-0/+32
* i965/skl: Emit depth stall workaround for gen9 as wellDamien Lespiau2014-12-081-1/+1
* i965/skl: Implement workaround for VF Invalidate issueJordan Justen2014-11-031-0/+9
* Revert 5 i965 patches: 8e27a4d2, 373143ed, c5bdf9be, 6f56e142, 88e3d404Jordan Justen2014-09-041-2/+2
* i965: Create a macro for setting a dirty bit.Paul Berry2014-09-011-2/+2
* i965: Drop the memcmp for finding duplicated CURBE uploads.Eric Anholt2014-07-021-5/+0
* i965: Reuse intel_upload.c for gen4/5 constant buffers.Eric Anholt2014-07-021-1/+0
* i965: Make batch dumping go to stderr, too.Eric Anholt2014-05-021-0/+1
* i965: Drop some more dead code from the old CACHED_BATCH feature.Eric Anholt2014-03-181-27/+0
* i965: Fix render-to-texture in non-FinishRenderTexture cases.Eric Anholt2014-03-061-0/+4
* i965: Only emit VS state pipe control workaround on IVB and BYT.Kenneth Graunke2014-02-271-1/+1
* i965: Implement a CS stall workaround on Broadwell.Kenneth Graunke2014-02-201-0/+36
* i965: Implement a brw_load_register_mem helper function.Kenneth Graunke2014-02-071-0/+25
* i965: Bump generation assertions on workaround flushes.Kenneth Graunke2014-01-311-2/+2
* i965: Update PIPE_CONTROL packet lengths for Broadwell.Kenneth Graunke2014-01-201-2/+20
* i965: Create a helper function for emitting PIPE_CONTROL writes.Kenneth Graunke2014-01-201-38/+50
* i965: Use full-length PIPE_CONTROL packets for workaround writes.Kenneth Graunke2014-01-201-6/+9
* i965: Emit full-length PIPE_CONTROLs for (non-write) flushes.Kenneth Graunke2014-01-201-2/+3
* i965: Create a helper function for emitting PIPE_CONTROL flushes.Kenneth Graunke2014-01-201-67/+58
* i965: Introduce an OUT_RELOC64 macro.Kenneth Graunke2014-01-201-0/+24
* i965: Use the new drm_intel_bo offset64 field.Kenneth Graunke2014-01-201-3/+3
* i965: Delete intel_batchbuffer_emit_reloc_fenced.Kenneth Graunke2014-01-201-25/+0
* i965: Remove CACHED_BATCH support altogether.Kenneth Graunke2014-01-171-42/+0
* s/Tungsten Graphics/VMware/José Fonseca2014-01-171-2/+2
* i965: Drop trailing whitespace from the rest of the driver.Kenneth Graunke2013-12-051-5/+5
* Revert "i965: Move brw_emit_query_begin() to the render ring prelude."Kenneth Graunke2013-12-031-7/+1
* i965: Take "bookend" OA snapshots at the start/end of each batch.Kenneth Graunke2013-11-211-2/+2
* i965: Start and stop OA counters as necessary.Kenneth Graunke2013-11-211-0/+7
* i965: Periodically dump the list of monitors if INTEL_DEBUG=perfmon.Kenneth Graunke2013-11-211-0/+3
* i965: Move brw_emit_query_begin() to the render ring prelude.Kenneth Graunke2013-11-211-0/+8
* i965: Introduce a "render ring prelude" hook.Kenneth Graunke2013-11-211-0/+5
* i965: Introduce an UNKNOWN_RING state.Kenneth Graunke2013-11-211-0/+8
* i965: Convert brw->batch.is_blit to a BLT_RING/RENDER_RING enum.Kenneth Graunke2013-11-211-8/+7
* i965/gen7: Emit workaround flush when changing GS enable state.Paul Berry2013-11-181-0/+30
* i965: Rework brw_new_batch to actually start a new batch.Kenneth Graunke2013-11-151-4/+5
* i965: Move cache_used_by_gpu flag setting to brw_finish_batch.Kenneth Graunke2013-11-151-6/+6
* i965: Un-virtualize brw_new_batch().Kenneth Graunke2013-10-171-1/+42
* i965: Un-virtualize brw_finish_batch().Kenneth Graunke2013-10-171-2/+22
* i965: Move need_workaround_flush = true to intel_batchbuffer_init.Kenneth Graunke2013-10-131-0/+2
* i965: Add missing state reset at the end of blorp.Eric Anholt2013-08-301-5/+5
* i965: Dump more information about batch buffer usage.Kenneth Graunke2013-08-161-3/+10
* i965: Cite the Ivybridge PRM for VS PIPE_CONTROL workarounds.Kenneth Graunke2013-07-151-2/+2
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-091-11/+6