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mesa
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drivers
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dri
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i965
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gen8_depth_state.c
Commit message (
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Author
Age
Files
Lines
*
i965: Use 8x4 aligned rectangles for HiZ operations on Broadwell.
Kenneth Graunke
2014-06-16
1
-4
/
+16
*
i965/gen8: Set depth extent field
Jordan Justen
2014-05-13
1
-1
/
+1
*
i965/gen8 depth: Set depth size based on LOD0 for 3D textures
Jordan Justen
2014-05-13
1
-2
/
+2
*
i965/Gen8: Set up layer constraints properly for depth buffers
Chris Forbes
2014-05-09
1
-9
/
+6
*
i965: Delete the intel_regions.c code.
Eric Anholt
2014-05-01
1
-1
/
+0
*
i965: Drop use of intel_region from miptrees.
Eric Anholt
2014-05-01
1
-7
/
+7
*
i965: Make Broadwell HiZ path arrange for TC flushes.
Kenneth Graunke
2014-04-22
1
-0
/
+3
*
i965/gen7: Skip repeated NULL depth/stencil state emits.
Eric Anholt
2014-04-11
1
-0
/
+8
*
i965: Set Broadwell MOCS values everywhere it's possible.
Kenneth Graunke
2014-03-25
1
-3
/
+4
*
i965: Implement HiZ resolves on Broadwell.
Kenneth Graunke
2014-02-19
1
-0
/
+103
*
i965: Refactor Gen8 depth packet emission.
Kenneth Graunke
2014-02-19
1
-72
/
+99
*
i965: Program 3DSTATE_HIER_DEPTH_BUFFER properly on Broadwell.
Kenneth Graunke
2014-02-19
1
-8
/
+17
*
i965: Update 3DSTATE_{DEPTH,STENCIL,...}_BUFFER and such for Broadwell.
Kenneth Graunke
2014-01-31
1
-0
/
+169