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path: root/src/mesa/drivers/dri/i965/gen7_vs_state.c
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* i965: Update max VS/PS threads shift offsets for Haswell.Kenneth Graunke2012-03-301-1/+3
* i965: Split the VS binding table to a separate table.Eric Anholt2012-02-211-1/+2
* i965: Emit Ivybridge VS workaround flushes.Kenneth Graunke2012-02-151-0/+2
* i965: Remove BRW_NEW_CURBE_OFFSETS dirty bit from Gen7 atoms.Kenneth Graunke2012-01-091-2/+1
* i965: Remove BRW_NEW_URB_FENCE dirty bit from Gen6+ atoms.Kenneth Graunke2012-01-091-1/+0
* i965: Put a proper sampler count in 3DSTATE_VS.Kenneth Graunke2011-11-101-1/+2
* i965: Upload SAMPLER_STATE pointers for the VS on Ivybridge.Kenneth Graunke2011-11-101-1/+7
* i965: Use a single binding table for all pipeline stages.Kenneth Graunke2011-11-101-1/+1
* i965: Use 0 for the number of binding table entries in 3DSTATE_(VS|WM).Kenneth Graunke2011-11-101-4/+1
* i965/gen6+: Switch GLSL from ALT to IEEE floating point modePaul Berry2011-10-311-1/+8
* i965: Rename (vs|wm)_max_threads to max_(vs|wm)_threads for consistency.Kenneth Graunke2011-10-251-1/+1
* i965: Add remaining scratch space setup emit to unit states.Eric Anholt2011-08-161-1/+9
* i965: Use state streaming on programs, and state base address on gen5+.Eric Anholt2011-06-181-1/+1
* i965: Warnings cleanup.Eric Anholt2011-05-251-1/+0
* i965: Upload binding table pointers on Ivybridge.Kenneth Graunke2011-05-171-0/+6
* i965: Initial Ivybridge VS state.Kenneth Graunke2011-05-171-0/+93