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path: root/src/mesa/drivers/dri/i965/gen7_blorp.cpp
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* i965: Change mipmap array_spacing_lod0 to array_layout (enum)Jordan Justen2014-08-151-1/+1
* i965: Make BLORP use brw_emit_sampler_state().Kenneth Graunke2014-08-021-58/+1
* i965: Use unreachable() instead of unconditional assert().Matt Turner2014-07-011-2/+1
* i965: Drop use of intel_region from miptrees.Eric Anholt2014-05-011-11/+11
* i965: Use the new drm_intel_bo offset64 field.Kenneth Graunke2014-01-201-2/+2
* i965/blorp: Get rid of redundant num_samples blorp param.Paul Berry2013-12-091-4/+6
* i965: refactor sample mask calculationChris Forbes2013-12-071-1/+1
* i965: Drop trailing whitespace from the rest of the driver.Kenneth Graunke2013-12-051-2/+2
* i965: Disable BLORP on Broadwell for now.Kenneth Graunke2013-11-211-0/+3
* i965/gen7: Emit workaround flush when changing GS enable state.Paul Berry2013-11-181-0/+16
* i965: Avoid flushing the batch for every blorp op.Eric Anholt2013-11-071-1/+0
* i965: Also emit HIER_DEPTH and STENCIL packets when disabling depth.Kenneth Graunke2013-10-281-0/+12
* gen7: Use logical, not physical, dims in 3DSTATE_DEPTH_BUFFER (v2)Chad Versace2013-10-071-2/+2
* i965/gs: Allocate push constant space for use by GS.Paul Berry2013-08-311-0/+6
* i965/gs: Allocate URB space for use by GS.Paul Berry2013-08-311-7/+9
* i965/gen7: Set MOCS L3 cacheability for IVB/BYT (v2)Ville Syrjälä2013-08-211-3/+3
* i965: Add Gen7 depth stall flushes before disabling depth in BLORP.Kenneth Graunke2013-08-161-0/+2
* gen7 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surfaceJordan Justen2013-08-041-49/+10
* gen7 blorp depth: calculate base surface width/heightJordan Justen2013-08-041-0/+13
* gen7 depth surface: calculate minimum array element being renderedJordan Justen2013-08-041-0/+7
* gen7 depth surface: calculate LOD being rendered toJordan Justen2013-08-041-0/+3
* gen7 depth surface: calculate depth (array size) for depth surfaceJordan Justen2013-08-041-0/+2
* gen7 depth surface: calculate more specific surface typeJordan Justen2013-08-041-0/+16
* i965/hsw: Change L3 MOCS for depth, hiz, and stencilChad Versace2013-07-181-2/+4
* i965/hsw: Change L3 MOCS of 3DSTATE_CONSTANT_VS/PSChad Versace2013-07-181-1/+3
* i965/hsw: Change L3 MOCS of SURFACE_STATChad Versace2013-07-181-1/+3
* i965: Cite the Ivybridge PRM for 3DSTATE_CLEAR_PARAMS notes.Kenneth Graunke2013-07-151-2/+2
* i965: Remove old BSpec reference from BLORP's 3DSTATE_WM/PS packets.Kenneth Graunke2013-07-151-2/+2
* i965: Cite the Ivybridge PRM for 3DSTATE_URB_* programming.Kenneth Graunke2013-07-151-2/+3
* i965: Delete intel_context entirely.Kenneth Graunke2013-07-091-1/+1
* i965: Move intel_context::is_<platform> flags to brw_context.Kenneth Graunke2013-07-091-6/+3
* i965: Move intel_context::batch to brw_context.Kenneth Graunke2013-07-091-1/+1
* i965: Pass brw_context to functions rather than intel_context.Kenneth Graunke2013-07-091-43/+3
* i965/blorp: Write blorp code to do render target resolves.Paul Berry2013-06-121-0/+3
* i965/gen7+: Implement fast color clear operation in BLORP.Paul Berry2013-06-121-4/+14
* i965/gen7+: Set up MCS in SURFACE_STATE whenever MCS is present.Paul Berry2013-06-121-1/+1
* i965/gen7+: Create an enum for keeping track of fast color clear state.Paul Berry2013-06-121-0/+1
* i965: Allocate push constant L3 space once at startup on Gen7+.Kenneth Graunke2013-06-101-1/+0
* i965: Disable pixel statistics in BLORP.Kenneth Graunke2013-05-201-1/+0
* i965: Fix hangs on HSW since the gen6 blorp fix.Eric Anholt2013-05-081-2/+101
* i965: Implement color clears using a simple shader in blorp.Eric Anholt2013-04-301-5/+7
* i965: Don't flush the batch at the end of blorp.Eric Anholt2013-04-301-9/+0
* i965/blorp: Remove unnecessary test in gen7_blorp_emit_depth_stencil_config.Paul Berry2013-04-101-7/+5
* i965: Change signature of brw_get_depthstencil_tile_masks()Chad Versace2013-04-101-1/+4
* intel: Hook up the WARN_ONCE macro to GL_ARB_debug_output.Eric Anholt2013-03-051-0/+1
* i965: add support for sample mask on Gen6+Chris Forbes2013-03-021-1/+1
* i965: Add WARN_ONCE for depthstencil workarounds we shouldn't be hitting.Eric Anholt2013-03-011-0/+3
* intel: Make intel_region's pitch be bytes instead of pixels.Eric Anholt2013-01-181-5/+3
* i965: Replace structs with bit-shifting for Gen7 SURFACE_STATE entries.Kenneth Graunke2013-01-031-32/+33
* i965: Share the draw x/y offset masking code between main/blorp and all gens.Eric Anholt2012-10-161-1/+4
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