| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | i965: Rewrite the HiZ op | Chad Versace | 2012-02-07 | 1 | -7/+2 |
| * | i965: Add missing _NEW_BUFFERS dirty bit to Gen6+ DEPTH_STENCIL atoms. | Kenneth Graunke | 2012-01-09 | 1 | -1/+1 |
| * | i965: Don't depth test the fake depthbuffer when one isn't present. | Eric Anholt | 2011-11-29 | 1 | -1/+6 |
| * | i965/gen6: Manipulate state batches for HiZ meta-ops [v4] | Chad Versace | 2011-11-22 | 1 | -3/+8 |
| * | i965/gen6: Move setup of CC state batches to emit time. | Eric Anholt | 2011-10-29 | 1 | -2/+2 |
| * | i965: Add a type argument to brw_state_batch(). | Eric Anholt | 2011-07-11 | 1 | -1/+2 |
| * | i965/gen6: Move the depth/stencil state to state streaming. | Eric Anholt | 2011-04-29 | 1 | -112/+42 |
| * | Drop GLcontext typedef and use struct gl_context instead | Kristian Høgsberg | 2010-10-13 | 1 | -1/+1 |
| * | intel: Change dri_bo_* to drm_intel_bo* to consistently use new API. | Eric Anholt | 2010-06-08 | 1 | -3/+3 |
| * | i965: Remove unnecessary headers. | Vinson Lee | 2010-02-25 | 1 | -4/+0 |
| * | i965: Start adding support for the Sandybridge CC unit. | Eric Anholt | 2010-02-25 | 1 | -0/+169 |
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