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* i965: Delete brw_state_flags::cache and related code.Kenneth Graunke2014-12-021-2/+0
| | | | | | | | | It's been merged into brw_state_flags::brw for simplicity and efficiency. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Alphabetize brw_tracked_state flags and use a consistent style.Kenneth Graunke2014-11-291-6/+9
| | | | | | | | | | | | | | | | Most of the dirty flags were listed in some arbitrary order. Some used bonus parenthesis. Some put multiple flags on one line, others put one per line. Some used tabs instead of spaces...but only on some lines. This patch settles on one flag per line, in alphabetical order, using spaces instead of tabs, and sheds the unnecessary parentheses. Sorting was mostly done with vim's visual block feature and !sort, although I alphabetized short lists by hand; it was pretty manual. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/skl: Update stencil reference handling for Skylake.Kenneth Graunke2014-11-031-3/+6
| | | | | | | | | Skylake uploads the stencil reference values in DW3 of the 3DSTATE_WM_DEPTH_STENCIL packet, rather than in COLOR_CALC_STATE. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Delete intel_context entirely.Kenneth Graunke2013-07-091-2/+2
| | | | | | | | | | This makes brw_context inherit directly from gl_context; that was the only thing left in intel_context. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Move intel_context::gen and gt fields to brw_context.Kenneth Graunke2013-07-091-5/+3
| | | | | | | | | | Most functions no longer use intel_context, so this patch additionally removes the local "intel" variables to avoid compiler warnings. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Chris Forbes <[email protected]> Acked-by: Paul Berry <[email protected]> Acked-by: Anuj Phogat <[email protected]>
* i965: Emit the depth/stencil state pointer directly, not via atoms.Kenneth Graunke2013-06-111-22/+0
| | | | | | | | | | | | | | | | | | | | | See two commits ago for the rationale. This allows us to delete the whole gen7_cc_state.c file. This does move these commands before the depth stall flushes from brw_emit_depthbuffer, which may be a problem. The documentation for 3DSTATE_DEPTH_BUFFER mentions that depth stall flushes are required before changing any depth/stencil buffer state, but explicitly lists 3DSTATE_DEPTH_BUFFER, 3DSTATE_HIER_DEPTH_BUFFER, 3DSTATE_STENCIL_BUFFER, and 3DSTATE_CLEAR_PARAMS. It does not mention this particular packet (_3DSTATE_DEPTH_STENCIL_STATE_POINTERS). No observed Piglit regressions on Sandybridge or Ivybridge. Together with the last two commits, this makes a cairo-gl benchmark faster by 0.324552% +/- 0.258355% on Ivybridge. No statistically significant change on Sandybridge. (Thanks to Eric for the numbers.) Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Emit the CC state pointer directly rather than via atoms.Kenneth Graunke2013-06-111-5/+18
| | | | | | See the previous commit for the rationale. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Emit the BLEND_STATE pointer directly rather than via atoms.Kenneth Graunke2013-06-111-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | Previously, we would: 1. Emit the new indirect state. 2. Flag CACHE_NEW_BLEND_STATE. 3. Rely on later state atoms to notice CACHE_NEW_BLEND_STATE and emit a pointer to the new indirect state. This is rather cumbersome: it requires two state atoms instead of one, and there's a strict ordering dependency in the list. Plus, the code gets spread across two functions (or even files in the case of Gen7+). Gen7+ has a packet to update just the blend state pointer, so it makes a lot of sense to simply emit that right away. Gen6 has a combined packet which updates blending, the color calculator, and depth/stencil state; however, each can still be modified independently. This drops the Gen6 micro-optimization where we tried to only emit one packet that changed all three states. State updates are pretty cheap. CACHE_NEW_BLEND_STATE is no longer necessary, so drop it. Signed-off-by: Kenneth Graunke <[email protected]>
* intel: Use accessor for stencil reference valuesChris Forbes2013-05-151-2/+3
| | | | | | | | | NOTE: This is a candidate for stable branches. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Avoid segfault in gen6_upload_stateCarl Worth2013-02-211-1/+1
| | | | | | | | | | | | | | | This fixes a bug introduced in commit 258453716f001eab1288d99765213 and triggered whenever "rb" is NULL. Fixes at least one cause bug #59445: [SNB/IVB/HSW Bisected]Oglc draw-buffers2(advanced.blending.none) segfault https://bugs.freedesktop.org/show_bug.cgi?id=59445 (Though segfaults are still possible in that test case, but they have been present since before commit 258453716f which is what's being fixed here.) Reviewed-by: Eric Anholt <[email protected]>
* i965: Examine _BaseFormat when deciding to perform xRGB_alpha fixupsCarl Worth2013-01-231-1/+2
| | | | | | | | | | | | | | | | | | | | | The renderbuffer's Format field may have an alpha channel even when the underlying _BaseFormat does not. This can happen when mesa chooses to use RGBA16 for an RGB16 format, for example. So look at _BaseFormat when deciding whether to fixup the blend factors. This test improves the results of at least the following piglit tests: EXT_frambebuffer_object/fbo-blending-formats {GL_RGB10, GL_RGB12, GL_RGB16} EXT_texture_snorm/fbo-blending-formats {GL_RGB16_SNORM, GLRGB8_SNORM, GL_RGB_SNORM} But none of these actually change from FAIL to PASS yet. The R, G, and B probe values are fixed with this commit, but the tests still fail because the alpha values are still wrong. Reviewed-by: Eric Anholt <[email protected]>
* i965: Avoid blending with destination alpha when RB format has no alpha bitsCarl Worth2013-01-141-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | The hardware does not support a render target without an alpha channel. So when the user creates a render buffer with no alpha channel, there actually is storage available for alpha internally. It requires special care to avoid these unwanted alpha bits from causing any problems. Specifically, when blending, and when the blend factors would read the destination alpha values, this commit coerces the blend factors to instead be either 0 or 1 as appropriate. A similar fix was made for pre-gen6 hardware in commit eadd9b8e and this commit shares the fixup function written by Ian then. This commit the following es3conform test: rgb8_rgba8_rgb As well as the following piglit (sub) tests: EXT_framebuffer_object/fbo-blending-formats/3 EXT_framebuffer_object/fbo-blending-formats/GL_RGB EXT_framebuffer_object/fbo-blending-formats/GL_RGB8 Reviewed-by: Ian Romanick <[email protected]>
* i965: Warn on a couple of workarounds in blending.Eric Anholt2012-10-161-2/+15
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* intel/i965: Disable SampleAlphaToOne if dual source blending enabledAnuj Phogat2012-09-291-2/+11
| | | | | | | | | | | From SandyBridge PRM, volume 2 Part 1, section 12.2.3, BLEND_STATE: DWord 1, Bit 30 (AlphaToOne Enable): "If Dual Source Blending is enabled, this bit must be disabled" Note: This is a candidate for stable branches. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/msaa: Disable alpha-to-{coverage, one} when drawbuffer zero is in ↵Anuj Phogat2012-07-181-7/+21
| | | | | | | | | | | | | | | | | | | integer format OpenGL specification 3.3 (page 196), section 4.1.3 says: If drawbuffer zero is not NONE and the buffer it references has an integer format, the SAMPLE_ALPHA_TO_COVERAGE and SAMPLE_ALPHA_TO_ONE operations are skipped." This should work properly even if there are other draw buffers that are not in integer format. This patch makes following piglit tests pass on mesa: int-draw-buffers-alpha-to-coverage int-draw-buffers-alpha-to-one Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Anuj Phogat <[email protected]>
* i965/msaa: Implement GL_SAMPLE_ALPHA_TO_{COVERAGE,ONE}.Paul Berry2012-06-261-1/+9
| | | | | | | | | | | | | | | | | | | | | | This patch enables the multisampling parameters GL_SAMPLE_ALPHA_TO_COVERAGE and GL_SAMPLE_ALPHA_TO_ONE, which allow the fragment shader's alpha output to be converted into a sample coverage mask and ignored for blending. i965 supports these parameters through the BLEND_STATE structure. The GL spec allows, but does not require, the implementation to dither the conversion from alpha to a sample coverage mask, so that alpha values that aren't a multiple of 1/num_samples result in the correct proportion of samples being lit. A bit exists in the BLEND_STATE structure to enable this functionality, but according to the hardware docs it must be disabled on Sandy Bridge (see the Sandy Bridge PRM, Vol2, Part1, p379: AlphaToCoverage Dither Enable). So it is enabled for Gen7 only. Fixes piglit tests "EXT_framebuffer_multisample/sample-alpha-to-{coverage,one} {2,4}". Reviewed-by: Anuj Phogat <[email protected]>
* i965: Add support for GL_ARB_draw_buffers_blend.Eric Anholt2012-05-041-6/+6
| | | | | | Tested with piglit fbo-draw-buffers-blend and intel oglconform. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen6+: Work around GPU hangs with logic ops on integer textures.Eric Anholt2012-01-241-2/+7
| | | | | | | | This doesn't result in correct rendering -- GL requires that logic ops work, while the hardware specs say it doesn't do them. I'm not sure how we would want to handle this. NOTE: This is a candidate for the 8.0 branch.
* i965/gen6+: Disable blending, alpha test, and dither on integer FBOs.Eric Anholt2012-01-241-6/+23
| | | | | | | Fixes GPU hangs and some rendering failures in piglit EXT_texture_integer/fbo-blending NOTE: This is a candidate for the 8.0 branch.
* i965/gen6: Move setup of CC state batches to emit time.Eric Anholt2011-10-291-4/+4
| | | | | | | | | | This is part of a series trying to eliminate the separate prepare() hook in state upload. The prepare() hook existed to support the check_aperture in between calculating state updates and setting up the batch, but there should be no reason for that any more. Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* i965/gen6: Fix segfault in prepare_blend_state()Chad Versace2011-10-181-1/+1
| | | | | | | | | | | | Don't dereference the color buffer if one isn't attached. This fixes the following Piglit tests in my experimental HiZ branch: glean/logicOp glean/paths Note: This is a candidate for the stable branches. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965: Set the pre/post-blend color clamp flags.Eric Anholt2011-09-261-0/+20
| | | | | | | No change in piglit results on gen6, but the spec demands it so let's do it. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Use ColorLogicOpEnabled instead of _LogicOpEnabledIan Romanick2011-09-191-1/+1
| | | | | | | | | | Since GL_EXT_blend_logic_op is removed, _LogicOpEnabled and ColorLogicOpEnabled always have the same value. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965: Add a type argument to brw_state_batch().Eric Anholt2011-07-111-2/+4
| | | | | | | | | I want to make brw_state_dump.c handle more than just the last statechange, so I want to keep track of what's in the batch state. By using AUB file numbering for most of these packets, this may be reusable for aub dumping. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Reissue PIPELINE_POINTERS and BINDING_TABLE_POINTERS on SBA change.Eric Anholt2011-06-281-1/+2
| | | | | This was a requirement we didn't run into until we started using STATE_BASE_ADDRESS for instruction data.
* i965/gen6: Fix blending state when no color buffer is bound.Eric Anholt2011-05-181-2/+12
| | | | | | | This is part of fixing fbo-alphatest-nocolor -- a regression in 35e8fe5c99b285f348cb8a1bba2931f120f7c0a1 after the initial regression, that had us using a garbage BLEND_STATE[0] (in particular, the alpha test enable) if no color buffer was bound.
* i965/gen6: Fix LogicOp handling for GL_COPY and/or floating-point RTs.Eric Anholt2011-04-291-5/+13
| | | | | | | | We were accidentally leaving blending enabled for LogicOp GL_COPY, which ARB_color_buffer_float/GL_RGBA32F-render (and friends) caught. Additionally, the GL spec says that no LogicOp should be done to floating-point targets, and the GPU gets really angry even if you say to LogicOp GL_COPY to float.
* i965/gen6: Use the dynamic state base address to reduce relocations.Eric Anholt2011-04-291-6/+3
| | | | | | | | | | Now that all the dynamic state is streamed through the top of the batchbuffer, we can cut out many of our relocations to that state by using the base address. Improves 3DMMES taiji performance 3.3% +/- 0.4% (n=15). Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen6: Move the depth/stencil state to state streaming.Eric Anholt2011-04-291-8/+2
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen6: Move the blend state to state streaming.Eric Anholt2011-04-291-102/+34
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen6: Move the color calc state to state streaming.Eric Anholt2011-04-291-74/+19
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Add support for ARB_color_buffer_float.Eric Anholt2011-04-201-4/+4
| | | | Reviewed-by: Brian Paul <[email protected]>
* i965: switch gen6 to use its own cc state boChris Wilson2011-02-211-6/+6
| | | | | | | In preparation for a greater change, use the color_calc_state_bo already provisioned for this purpose. Signed-off-by: Chris Wilson <[email protected]>
* mesa: begin implementation of GL_ARB_draw_buffers_blendBrian Paul2011-01-151-6/+6
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* i965: Rename various gen6 #defines to match the documentation.Kenneth Graunke2011-01-061-1/+1
| | | | | | | | This should make it easier to cross-reference the code and hardware documentation, as well as clear up any confusion on whether constants like CMD_3D_WM_STATE mean WM_STATE (pre-gen6) or 3DSTATE_WM (gen6+). This does not rename any pre-gen6 defines.
* i965: Set up the per-render-target blend state on gen6.Eric Anholt2010-12-081-46/+49
| | | | This will let us get EXT_draw_buffers2 blending and colormasking working.
* i965: Set up the color masking for the first drawbuffer on gen6.Eric Anholt2010-12-081-0/+9
| | | | Fixes glean/maskedClear
* i965: Don't try to store gen6 (float) blend constant color in bytes.Eric Anholt2010-12-071-1/+1
| | | | Fixes glean/blendFunc
* i965: Update the gen6 stencil ref state when stencil state changes.Eric Anholt2010-10-281-1/+1
| | | | Fixes 6 piglit tests about stencil operations.
* i965: Remove the gen6 emit_mi_flushes I sprinkled around the driver.Eric Anholt2010-10-191-2/+0
| | | | | These were for debugging in bringup. Now that relatively complicated apps are working, they haven't helped debug anything in quite a while.
* Drop GLcontext typedef and use struct gl_context insteadKristian Høgsberg2010-10-131-2/+2
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* i965: fix depth test on sandybridgeZhenyu Wang2010-08-311-1/+1
| | | | | | | | | This includes several corrections for fixing depth test on sandybridge. Fix wrong bits definition in depth stencil state. Fix wrong order of state buffer offset in 3DSTATE_CC_STATE_POINTERS command. Correctly use buffer width parameter in depth buffer setting. Signed-off-by: Zhenyu Wang <[email protected]>
* i965: Rename SNB brw_*_key structs to gen6_*_key structs.Eric Anholt2010-03-051-8/+8
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* i965: Pack gen6 blend_state_key structure.Eric Anholt2010-03-051-2/+1
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* i965: include macros.h to get CLAMP macroBrian Paul2010-03-021-0/+1
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* i965: Remove unnecessary headers.Vinson Lee2010-02-251-2/+0
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* i965: Giant pile of flushing to track down SNB bringup issues.Eric Anholt2010-02-251-0/+2
| | | | This should go away before we push the code.
* i965: Start adding support for the Sandybridge CC unit.Eric Anholt2010-02-251-0/+296
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