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path: root/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
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* i965: indentation fixesBrian Paul2009-01-141-8/+14
* i965: Add a new state flag BRW_NEW_NR_SURFACES instead of CACHE_NEW_SURFACEEric Anholt2008-11-281-0/+5
* i965: Fix overwriting of depth override for SetTexOffset.Eric Anholt2008-10-011-1/+0
* mesa: added "main/" prefix to includes, remove some -I paths from Makefile.te...Brian Paul2008-09-181-3/+3
* intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change.Eric Anholt2008-09-101-17/+17
* intel: Fix depth_stencil texture.Xiang, Haihao2008-09-041-1/+1
* Revert "Revert "Merge branch 'drm-gem'""Dave Airlie2008-08-241-58/+58
* Revert "Merge branch 'drm-gem'"Dave Airlie2008-08-241-58/+58
* i965: fixup format for TFP zero copyDave Airlie2008-08-201-2/+12
* i965: make tex offset override work..Dave Airlie2008-08-201-15/+30
* intel-gem: Update to new check_aperture API for classic mode.Eric Anholt2008-08-081-30/+8
* drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.Eric Anholt2008-07-111-10/+27
* [intel-gem] Chase domain flag renaming in the DRM.Eric Anholt2008-06-111-5/+5
* [intel] Convert drivers to using libdrm bufmgr code.Eric Anholt2008-06-031-17/+17
* GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.Eric Anholt2008-05-071-7/+9
* i965: fix DEPTH_TEXTURE_MODE (bug #14220)Xiang, Haihao2008-04-221-4/+10
* i965: initial attempt at fixing the aperture overflowDave Airlie2008-04-181-24/+51
* [965] Initialize region surface key structure padding.Eric Anholt2008-03-191-0/+2
* intel: fix abort issue with shadowtex demo when useXiang, Haihao2008-03-141-0/+3
* [i965] multiple rendering target supportZou Nan hai2008-03-131-25/+29
* [965] Fix conditional sequencing to allow the frame_buffer_texobj case.Eric Anholt2008-02-281-8/+6
* [intel] Add more cliprect modes to cover other meanings for batch emits.Eric Anholt2008-01-101-3/+1
* [intel] Convert relocations to not be cleared out on buffer submit.Eric Anholt2008-01-031-49/+38
* [965] Convert surface state to use a cache key instead of brw_cache_data.Eric Anholt2008-01-021-48/+87
* [965] Allow draw or depth regions to be NULL.Eric Anholt2007-12-171-20/+30
* i965: check NULL pointerXiang, Haihao2007-12-171-1/+4
* [965] Fully initialize the texture surface key data (padding around GLboolean)Eric Anholt2007-12-161-0/+1
* [965] Move to using shared texture management code.Eric Anholt2007-12-161-1/+1
* [965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt2007-12-141-36/+121
* [965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt2007-12-071-10/+37
* [965] Remove dead code in upload_wm_surfaces.Eric Anholt2007-12-071-3/+0
* [965] Move brw_surface_state stack allocation into the function using it.Eric Anholt2007-12-071-30/+28
* i965: roland's DXTn format texture patch(bug10347)Xiang, Haihao2007-08-101-2/+10
* EXT_texture_sRGB support on i965Zou Nan hai2007-08-021-0/+5
* i965: Use I16_UNORM instead of L16_UNORM (bug 11742)Xiang, Haihao2007-07-311-1/+1
* Add accelerated CopyPixels for non-overlapping, 1:1 blits.Eric Anholt2006-11-291-0/+6
* use the requested internal texture format where possibleKeith Whitwell2006-09-211-1/+11
* Make sure bmBufferOffset is called for all active buffers every timeKeith Whitwell2006-09-071-1/+3
* Add Intel i965G/Q DRI driver.Eric Anholt2006-08-091-0/+250
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