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path: root/src/mesa/drivers/dri/i965/brw_wm_state.c
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* [965] Fix WM unit cache keying that broke line stipple and polygon offset.Eric Anholt2008-01-191-9/+14
* [intel] Convert relocations to not be cleared out on buffer submit.Eric Anholt2008-01-031-37/+32
* [965] Fix some missing initialization in WM keys.Eric Anholt2008-01-031-0/+6
* [965] Convert WM unit to use a cache key instead of brw_cache_data.Eric Anholt2008-01-021-79/+126
* [965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt2007-12-141-22/+56
* [intel] Move bufmgr back to context instead of screen, fixing glthreads.Eric Anholt2007-12-121-1/+1
* [965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt2007-12-071-35/+38
* Merge branch '965-glsl'Zou Nan hai2007-10-261-1/+6
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| * support branch and loop in pixel shaderZou Nan hai2007-06-211-1/+6
* | [965] Replace various alignment code with a shared ALIGN() macro.Eric Anholt2007-10-041-2/+2
* | Revert "WIP 965 conversion to dri_bufmgr."Eric Anholt2007-09-271-1/+1
* | WIP 965 conversion to dri_bufmgr.Eric Anholt2007-09-271-1/+1
* | i965: samplers group in fours in WM_STATE. fix bug#9415Xiang, Haihao2007-08-291-1/+1
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* Various warning fixes for i965 driver.Keith Packard2007-01-061-1/+1
* i965: ARB_occlusion_query supportWang Zhenyu2007-01-061-1/+1
* Use lower alignments where possible. Also pad out allocated blocks toKeith Whitwell2006-09-071-1/+1
* Make sure bmBufferOffset is called for all active buffers every timeKeith Whitwell2006-09-071-1/+5
* Add Intel i965G/Q DRI driver.Eric Anholt2006-08-091-0/+190