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path: root/src/mesa/drivers/dri/i965/brw_wm_emit.c
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* i965: Fix 8-wide FB writes on gen6.Eric Anholt2010-08-221-12/+5
* i965: Fix brw_math1 with scalar argument in gen6 FS.Eric Anholt2010-08-221-2/+14
* i965: Also use the SIMD8 FB writes for SIMD8 mode on non-SNB.Eric Anholt2010-08-201-11/+10
* i965: Add support for FB writes on Sandybridge.Zhenyu Wang2010-08-201-2/+32
* i965: Fix DP write channel ordering on Sandybridge.Eric Anholt2010-08-201-2/+25
* i965: Use the implied move available in most brw_wm_emit brw_math() calls.Eric Anholt2010-08-161-16/+4
* i965: More s/stderr/stdout/ for program debug.Eric Anholt2010-08-091-1/+1
* Merge remote branch 'origin/master' into glsl2Eric Anholt2010-07-261-3/+11
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| * i965: Fix reversed naming of the operations in compute-to-mrf optimization.Eric Anholt2010-07-261-1/+1
| * i965: Clean up a few magic numbers to use brw_defines.h defs.Eric Anholt2010-07-261-1/+1
| * i965: Move the GRF-to-MRF optimizations to brw_optimize.c.Eric Anholt2010-07-261-619/+3
| * i965: Improve (i.e. remove) some grf-to-mrf unnecessary movesBenjamin Segovia2010-07-261-2/+626
* | i965: Add support for the DP2 opcode, which we use for dot(vec2, vec2).Eric Anholt2010-07-021-0/+25
* | i965: Add support for OPCODE_SSG.Eric Anholt2010-06-301-0/+26
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* i965: Dump out the correct shared function for SEND on Ironlake.Eric Anholt2010-05-141-1/+1
* intel: Clean up chipset name and gen num for IronlakeZhenyu Wang2010-04-211-9/+9
* i965: Allow FS constants to be used as immediates instead of push/pull.Eric Anholt2010-03-221-0/+38
* i965: Optimize OPCODE_CMP by using BRW_SEL to choose results.Eric Anholt2010-03-221-5/+1
* Revert "i965: Do FS SLT, SGT, and friends using CMP, SEL instead of CMP, MOV,...Eric Anholt2010-03-161-2/+5
* i965: Clarify the roles of emit_pixel_xy(), emit_delta_xy(), emit_wpos_xy().Eric Anholt2010-03-121-7/+19
* i965: Clarify that DELTAXY always occurs for both X and Y.Eric Anholt2010-03-121-14/+13
* i965: Do FS SLT, SGT, and friends using CMP, SEL instead of CMP, MOV, MOV.Eric Anholt2010-03-121-5/+2
* i965: When doing a swizzled kill pixel, don't do redundant channel compares.Eric Anholt2010-03-121-4/+12
* i965: Use the SEL instruction to implement MIN and MAX.Eric Anholt2010-03-121-11/+3
* i965: Use the PLN instruction when possible in interpolation.Eric Anholt2010-03-101-6/+38
* i965: Add support for the CMP opcode in the GLSL path.Eric Anholt2010-03-101-6/+6
* Replace the _mesa_*printf() wrappers with the plain libc versionsKristian Høgsberg2010-02-191-6/+6
* i965: Fix fp fragment.position handling and enable HW part of ARB_fcc.Eric Anholt2010-01-261-10/+34
* Merge branch 'mesa_7_7_branch'Brian Paul2010-01-081-1/+1
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| * i965: fix invalid assertion in emit_xpd(), againBrian Paul2010-01-061-1/+1
| * i965: fix invalid assertion in emit_xpd()Brian Paul2010-01-051-1/+1
* | Merge branch 'mesa_7_7_branch'Brian Paul2009-12-311-1/+1
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| * intel: Silence compiler warnings.Vinson Lee2009-12-281-1/+1
* | intel: Replace IS_G4X() across the driver with context structure usage.Eric Anholt2009-12-221-2/+1
* | intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.Eric Anholt2009-12-221-6/+9
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* i965: Share OPCODE_TXB between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-131-30/+51
* i965: Share OPCODE_TEX between brw_wm_emit.c and brw_wm_glsl.c.Eric Anholt2009-11-131-29/+58
* i965: Clean up emit_tex a bit.Eric Anholt2009-11-131-27/+24
* Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt2009-11-131-7/+17
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| * i965: Fix Ironlake shadow comparisons.Eric Anholt2009-11-121-7/+17
* | i965: Clean up Ironlake sampler type definitions.Eric Anholt2009-11-131-3/+3
* | i965: Use Compr4 instruction compression mode on G4X and newer.Eric Anholt2009-11-061-11/+22
* | i965: Share min/max between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-061-10/+10
* | i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-061-27/+29
* | i965: Share most of the WM functions between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-061-48/+67
* | i965: Share math functions between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt2009-11-061-53/+86
* | i965: Share the sop opcodes between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt2009-11-061-8/+11
* | i965: Share OPCODE_MAD between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-061-6/+6
* | i965: Share the DP3, DP4, and DPH between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-061-15/+15
* | i965: Add generic GLSL code for unaliasing a 3-arg opcode, and share LRP code.Eric Anholt2009-11-061-6/+6