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path: root/src/mesa/drivers/dri/i965/brw_wm.h
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* intel: Add a vtbl hook for determining if a format is renderable.Eric Anholt2011-01-071-0/+1
* i965: Drop KIL_NV from the ff/ARB_fp path since it was only used for GLSL.Eric Anholt2010-12-081-1/+0
* i965: Nuke brw_wm_glsl.c.Eric Anholt2010-12-061-2/+0
* i965: Move payload reg setup to compile, not lookup time.Eric Anholt2010-12-061-13/+14
* i965: Fix gl_FragCoord inversion when drawing to an FBO.Eric Anholt2010-11-141-1/+2
* i965: Disable thread dispatch when the FS doesn't do any work.Eric Anholt2010-10-191-0/+3
* Drop GLcontext typedef and use struct gl_context insteadKristian Høgsberg2010-10-131-4/+4
* i965: Move FS backend structures to a header.Eric Anholt2010-10-111-3/+0
* i965: Fix up part of my Sandybridge attributes support patch.Eric Anholt2010-09-281-2/+4
* i965: Add support for attribute interpolation on Sandybridge.Eric Anholt2010-09-281-2/+5
* i965: Track the windowizer's dispatch for kill pixel, promoted, and OQEric Anholt2010-09-211-1/+2
* i965: Share the KIL_NV implementation between glsl and non-glsl.Eric Anholt2010-09-211-0/+1
* i965: Start building direct GLSL2 IR to 965 assembly codegen.Eric Anholt2010-08-261-0/+1
* i965: Add new pass to split vectors into scalar variablesEric Anholt2010-08-261-0/+1
* i965: Add a pass for the FS to reduce vector expressions down to scalar.Eric Anholt2010-08-261-0/+2
* i965: Start building 965 FS backend.Eric Anholt2010-08-261-0/+6
* i965: Rename nr_depth_regs to nr_payload_regs.Eric Anholt2010-08-201-1/+1
* Merge remote branch 'origin/master' into glsl2Eric Anholt2010-07-261-1/+1
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| * mesa: rename src/mesa/shader/ to src/mesa/program/Brian Paul2010-06-101-1/+1
* | i965: Add support for the DP2 opcode, which we use for dot(vec2, vec2).Eric Anholt2010-07-021-0/+5
* | i965: Add support for OPCODE_SSG.Eric Anholt2010-06-301-0/+4
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* i965: Fix bit allocation for number of color regions for ARB_draw_buffers.Eric Anholt2010-05-231-1/+1
* i965: Allow FS constants to be used as immediates instead of push/pull.Eric Anholt2010-03-221-1/+1
* i965: Add support for the CMP opcode in the GLSL path.Eric Anholt2010-03-101-0/+6
* i965: Fix fp fragment.position handling and enable HW part of ARB_fcc.Eric Anholt2010-01-261-1/+0
* i965: Pack the brw_wm_prog_key better.Eric Anholt2009-11-191-1/+1
* Merge branch 'outputswritten64'Ian Romanick2009-11-171-1/+1
* i965: Share OPCODE_TXB between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-131-0/+7
* i965: Share OPCODE_TEX between brw_wm_emit.c and brw_wm_glsl.c.Eric Anholt2009-11-131-0/+8
* i965: avoid memsetting all the BRW_WM_MAX_INSN arrays for every compile.Eric Anholt2009-11-101-4/+4
* i965: Share min/max between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-061-0/+10
* i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-061-0/+6
* i965: Share most of the WM functions between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-061-0/+34
* i965: Share math functions between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt2009-11-061-0/+16
* i965: Share the sop opcodes between brw_wm_glsl.c and brw_wm_emit.c.Eric Anholt2009-11-061-0/+6
* i965: Share OPCODE_MAD between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-061-0/+6
* i965: Share the DP3, DP4, and DPH between brw_wm_glsl.c and brw_wm_emit.cEric Anholt2009-11-061-0/+15
* i965: Add generic GLSL code for unaliasing a 3-arg opcode, and share LRP code.Eric Anholt2009-11-061-0/+6
* i965: Share basic ALU ops between brw_wm_glsl and brw_wm_emit.cEric Anholt2009-11-061-0/+17
* i965: Collect GLSL src/dst regs up in generic code.Eric Anholt2009-11-061-0/+2
* i965: Fix BRW_WM_MAX_INSN to reflect current limits.Eric Anholt2009-10-301-2/+1
* i965: make brw_wm_prog_key a little smallerBrian Paul2009-10-291-3/+3
* i965: don't use context state in emit_fb_write()Brian Paul2009-10-291-0/+1
* i965: use macros to get/set prog_instruction::Aux fieldBrian Paul2009-10-291-0/+6
* i965: Move OPCODE_DDX/DDY to brw_wm_emit.c and make it actually work.Eric Anholt2009-09-111-1/+7
* i965: drop dead scalar handling in GLSL.Eric Anholt2009-08-121-1/+0
* i965: Store the dispatch width in the WM compile struct.Eric Anholt2009-08-121-0/+1
* i965: Handle scalar result swizzling in shared GLSL/non-GLSL code.Eric Anholt2009-08-121-0/+1
* i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt2009-08-051-0/+1
* Merge branch 'mesa_7_5_branch'Brian Paul2009-06-161-1/+1
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