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path: root/src/mesa/drivers/dri/i965/brw_vec4_tes.cpp
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* i965: Move intel_debug.h to intel/common/gen_debug.hJason Ekstrand2017-03-011-1/+1
* i965: Reduce cross-pollination between the DRI driver and compilerJason Ekstrand2017-03-011-0/+1
* i965/vec4/tes: consider register offsets during attribute setupIago Toral Quiroga2017-01-031-2/+2
* i965/vec4/tes: fix setup_payload() for 64bit data typesIago Toral Quiroga2017-01-031-1/+20
* i965/vec4/tes: fix input loading for 64bit data typesIago Toral Quiroga2017-01-031-17/+55
* i965/vec4: add packing support for tcs load outputsTimothy Arceri2016-07-211-3/+3
* i965/vec4: add support for packing tes inputsTimothy Arceri2016-07-211-4/+10
* i965: Silence unused parameter warningsIan Romanick2016-05-181-1/+1
* i965: Fix gl_TessLevelOuter[] for isolines.Kenneth Graunke2016-03-181-3/+9
* i965: Push most TES inputs in vec4 mode.Kenneth Graunke2016-02-291-31/+53
* i965: Port tessellation evaluation shaders to vec4 mode.Kenneth Graunke2015-12-281-0/+204