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path: root/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
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* i965/vs: Try again when we've successfully spilled a reg.Eric Anholt2012-10-101-7/+10
* i965/vs: Implement register spilling.Kenneth Graunke2012-10-101-1/+127
* ra: Add q_values parameter to ra_set_finalize()Tom Stellard2012-09-191-1/+1
* intel: Fix signed/unsigned comparison warnings.Eric Anholt2012-05-141-3/+3
* i965/vs: Avoid allocating registers in to the gen7 MRF hack region.Eric Anholt2012-01-301-3/+3
* mesa: Make the register allocator allocation take a ralloc context.Eric Anholt2012-01-181-1/+1
* i965/vs: When failing due to lack of spilling, don't continue on.Eric Anholt2011-09-081-0/+1
* i965/vs: Fix GPU hangs in shaders with large virtual GRFs pre-gen6.Eric Anholt2011-09-061-1/+2
* i965: Fix Android build by removing relative includesChad Versace2011-08-301-1/+1
* i965/vs: Implement proper register allocation instead of 1:1 mapping.Eric Anholt2011-08-191-1/+138
* i965/vs: Remove stale comment about compressed instructions.Eric Anholt2011-08-191-1/+0
* i965/vs: Fix the trivial register allocator's failure path.Eric Anholt2011-08-161-3/+2
* i965/vs: Slightly improve the trivial reg allocator to skip unused regs.Eric Anholt2011-08-161-2/+24
* i965: Start adding the VS visitor and codegen.Eric Anholt2011-08-161-0/+77