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path: root/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
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* i965/vec4: Get rid of the uniform_size arrayJason Ekstrand2016-04-141-9/+0
* i965/vec4: Use MOV_INDIRECT instead of reladdr for indirect push constantsJason Ekstrand2016-04-141-4/+6
* i965/vec4: Use UD rather than D for uniform indirectsJason Ekstrand2016-04-141-1/+1
* i965: Implement the new imod and irem opcodesJason Ekstrand2016-04-131-0/+36
* i965: Port INTEL_PRECISE_TRIG=1 to NIR.Kenneth Graunke2016-04-111-14/+2
* i965/nir: Provide a default LOD for buffer texturesJason Ekstrand2016-04-041-0/+4
* i965: Add an INTEL_PRECISE_TRIG=1 option to fix SIN/COS output range.Kenneth Graunke2016-04-041-2/+14
* i965: Add an implemnetation of nir_op_fquantize2f16Jason Ekstrand2016-04-011-0/+25
* nir: rename nir_const_value fields to include bitsize informationIago Toral Quiroga2016-03-171-22/+22
* i965/vec4/nir: no need to use surface_access:: to call emit_untyped_atomicAlejandro Piñeiro2016-03-081-6/+5
* i965/vec4/nir: remove emit_untyped_surface_read and emit_untyped_atomic at br...Alejandro Piñeiro2016-03-081-13/+23
* i965: Push most TES inputs in vec4 mode.Kenneth Graunke2016-02-291-3/+1
* nir: Remove the const_offset from nir_tex_instrJason Ekstrand2016-02-101-10/+11
* i965/vec4: Plumb separate surfaces and samplers through from NIRJason Ekstrand2016-02-091-3/+12
* nir: Separate texture from sampler in nir_tex_instrJason Ekstrand2016-02-091-0/+3
* nir/tex_instr: Rename sampler to textureJason Ekstrand2016-02-091-12/+12
* i965/vec4: Implement nir_op_pack_uvec2_to_uint.Matt Turner2016-02-011-0/+18
* i965/vec4: Spaces around operators.Matt Turner2016-01-191-1/+1
* i965/vec4: Use UW type for multiply into accumulator on GEN8+Jason Ekstrand2016-01-151-1/+5
* nir: Lower bitfield_extract.Matt Turner2016-01-141-0/+3
* glsl: Delete the ir_binop_bfm and ir_triop_bfi opcodes.Kenneth Graunke2016-01-131-2/+1
* i965: Add support for gl_DrawIDARB and enable extensionKristian Høgsberg Kristensen2015-12-291-0/+8
* i965: Add support for gl_BaseVertexARB and gl_BaseInstanceARBKristian Høgsberg Kristensen2015-12-291-0/+8
* nir: Get rid of function overloadsJason Ekstrand2015-12-281-8/+8
* i965: Add tessellation control shaders.Kenneth Graunke2015-12-221-1/+22
* i965/vec4: Optimize predicate handling for any/all.Matt Turner2015-12-181-18/+75
* nir: Delete bany, ball, fany, fall.Matt Turner2015-12-181-14/+0
* nir: Get rid of *_indirect variants of input/output load/store intrinsicsJason Ekstrand2015-12-101-55/+40
* i965: Make uniform offsets be in terms of bytesJason Ekstrand2015-12-071-4/+8
* i965/vec4: Use a stride of 1 and byte offsets for UBOsJason Ekstrand2015-12-071-13/+3
* i965/vec4: Use byte offsets for UBO pulls on Sandy BridgeJason Ekstrand2015-12-071-5/+13
* i965/vec4: Stop pretending to support indirect output storesJason Ekstrand2015-12-031-9/+3
* i965/vec4: Get rid of the nir_inputs arrayJason Ekstrand2015-12-031-22/+1
* i965: Clean up #includes in the compiler.Matt Turner2015-11-241-1/+0
* i965: Push down inclusion of brw_program.h.Matt Turner2015-11-241-0/+1
* i965: Use NIR for lowering texture swizzleJason Ekstrand2015-11-231-13/+11
* nir: s/nir_type_unsigned/nir_type_uintJason Ekstrand2015-11-231-1/+1
* i965/vec4: Initialize nir_inputs with src_reg().Matt Turner2015-11-201-1/+1
* i965: Enable EXT_shader_samples_identicalIan Romanick2015-11-191-1/+3
* i965/vec4: Handle nir_tex_src_ms_index more like the scalarIan Romanick2015-11-191-8/+10
* nir: Add nir_texop_samples_identical opcodeIan Romanick2015-11-191-0/+1
* i965/vec4: Replace src_reg(imm) constructors with brw_imm_*().Matt Turner2015-11-191-39/+39
* i965: Rename GRF to VGRF.Matt Turner2015-11-131-4/+4
* i965: Initialize registers.Matt Turner2015-11-131-0/+9
* i965/vec4: Do not mark used surfaces in VS_OPCODE_GET_BUFFER_SIZEIago Toral Quiroga2015-11-051-3/+5
* i965/vec4: Do not mark used direct surfaces in VS_OPCODE_PULL_CONSTANT_LOADIago Toral Quiroga2015-11-051-2/+4
* i965/vec4: select predicate based on writemask for sel emissionsAlejandro Piñeiro2015-11-051-1/+17
* i965/vec4: Clean up FBH code.Matt Turner2015-11-021-13/+5
* i965/vec4: Don't disable channels in any/all comparisons.Matt Turner2015-11-021-42/+10
* i965: Implement nir_intrinsic_shader_clockEmil Velikov2015-10-301-0/+10
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