index
:
mesa.git
gallium_va_encpackedheader01
master
Unnamed repository; edit this file 'description' to name the repository.
about
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
mesa
/
drivers
/
dri
/
i965
/
brw_shader.cpp
Commit message (
Expand
)
Author
Age
Files
Lines
*
i965: Remove useless IR self-destruct backend_shader method.
Francisco Jerez
2016-03-13
1
-7
/
+0
*
i965: Avoid recalculating the tessellation VUE map for IO lowering.
Kenneth Graunke
2016-02-26
1
-7
/
+8
*
i965: Eliminate brw_nir_lower_{inputs,outputs,io} functions.
Kenneth Graunke
2016-02-26
1
-1
/
+2
*
glsl/types: Add support for function types
Jason Ekstrand
2016-02-13
1
-0
/
+1
*
i965: Apply VS attribute workarounds in NIR.
Kenneth Graunke
2016-02-09
1
-1
/
+1
*
i965/fs: Implement support for extract_word.
Matt Turner
2016-02-01
1
-0
/
+4
*
i965: Move brw_compiler_create() to new brw_compiler.c.
Matt Turner
2016-02-01
1
-130
/
+0
*
i965/fs/generator: Take an actual shader stage rather than a string
Jason Ekstrand
2016-01-15
1
-1
/
+1
*
nir: Lower bitfield_extract.
Matt Turner
2016-01-14
1
-0
/
+1
*
i965: Mark TCS URB writes as having side effects.
Kenneth Graunke
2016-01-12
1
-0
/
+1
*
glsl: Move _mesa_shader_stage_to_string/abbrev to shader_enums.c
Kristian Høgsberg Kristensen
2016-01-08
1
-1
/
+0
*
i965/compiler: Enable more lowering in NIR
Jason Ekstrand
2016-01-07
1
-0
/
+7
*
nir: Add a lower_fdiv option, turn fdiv into fmul/frcp.
Kenneth Graunke
2016-01-05
1
-0
/
+1
*
i965: Don't set interleave or complete on TCS EOT message.
Kenneth Graunke
2015-12-28
1
-0
/
+2
*
i965: Relase input URB Handles on Gen7/7.5 when TCS threads finish.
Kenneth Graunke
2015-12-28
1
-0
/
+5
*
i965: Port tessellation evaluation shaders to vec4 mode.
Kenneth Graunke
2015-12-28
1
-2
/
+23
*
i965: Handle mix-and-match TCS/TES with separate shader objects.
Kenneth Graunke
2015-12-22
1
-0
/
+2
*
i965: Defer input lowering for tessellation stages until specialization.
Kenneth Graunke
2015-12-22
1
-0
/
+1
*
i965: Add tessellation control shaders.
Kenneth Graunke
2015-12-22
1
-0
/
+17
*
i965: Add tessellation evaluation shaders
Kenneth Graunke
2015-12-22
1
-0
/
+94
*
i965: Lower shared variable references to intrinsic calls
Jordan Justen
2015-12-09
1
-0
/
+3
*
i965: Clean up #includes in the compiler.
Matt Turner
2015-11-24
1
-6
/
+3
*
i965: Mark functions called from C as extern "C".
Matt Turner
2015-11-24
1
-2
/
+2
*
i965: Add and use backend_reg::equals().
Matt Turner
2015-11-24
1
-0
/
+7
*
util: move brw_env_var_as_boolean() to util
Rob Clark
2015-11-24
1
-1
/
+2
*
i965/fs: Use brw_imm_uw().
Matt Turner
2015-11-19
1
-6
/
+2
*
i965: Allow indirect GS input indexing in the scalar backend.
Kenneth Graunke
2015-11-18
1
-0
/
+3
*
i965: Convert scalar_* flags to a scalar_stage array.
Kenneth Graunke
2015-11-16
1
-22
/
+7
*
i965: Introduce a MOV_INDIRECT opcode.
Kenneth Graunke
2015-11-14
1
-0
/
+2
*
i965: Add a SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT opcode.
Kenneth Graunke
2015-11-13
1
-0
/
+2
*
i965: Replace HW_REG with ARF/FIXED_GRF.
Matt Turner
2015-11-13
1
-6
/
+2
*
i965: Use brw_reg's nr field to store register number.
Matt Turner
2015-11-13
1
-1
/
+1
*
i965: Remove fixed_hw_reg field from backend_reg.
Matt Turner
2015-11-13
1
-4
/
+4
*
i965: Use immediate storage in inherited brw_reg.
Matt Turner
2015-11-13
1
-5
/
+5
*
i965: Make 'dw1' and 'bits' unnamed structures in brw_reg.
Matt Turner
2015-11-13
1
-15
/
+15
*
i965: Fill out instruction list.
Matt Turner
2015-11-12
1
-1
/
+1
*
i965: Consolidate is_3src() functions.
Matt Turner
2015-11-12
1
-1
/
+1
*
glsl: Lower UBO and SSBO access in glsl linker
Kristian Høgsberg Kristensen
2015-11-10
1
-0
/
+2
*
i965/fs/skl+: Use ld2dms_w instead of ld2dms
Neil Roberts
2015-11-05
1
-0
/
+5
*
glsl: keep track of intra-stage indices for atomics
Timothy Arceri
2015-10-27
1
-2
/
+2
*
i965/fs: Disable CSE optimization for untyped & typed surface reads
Jordan Justen
2015-10-22
1
-0
/
+14
*
i965: Implement ARB_shader_stencil_export (gen9+)
Ben Widawsky
2015-10-21
1
-0
/
+2
*
i965: Add a brw->scalar_gs flag controlled by INTEL_SCALAR_GS=1.
Kenneth Graunke
2015-10-21
1
-0
/
+5
*
i965: Introduce a new SHADER_OPCODE_URB_READ_SIMD8 opcode.
Kenneth Graunke
2015-10-21
1
-0
/
+2
*
i965: Introduce new SHADER_OPCODE_URB_WRITE_SIMD8_MASKED/PER_SLOT opcodes.
Kenneth Graunke
2015-10-21
1
-0
/
+9
*
i965: Use a const nir_shader in backend_shader
Jason Ekstrand
2015-10-19
1
-1
/
+1
*
i965: Adapt SSBOs to work with their own separate index space
Iago Toral Quiroga
2015-10-14
1
-2
/
+7
*
mesa: Rename {Num}UniformBlocks to {Num}BufferInterfaceBlocks
Iago Toral Quiroga
2015-10-14
1
-2
/
+2
*
i965: Move brw_select_clip_planes() to brw_shader.cpp
Kristian Høgsberg Kristensen
2015-10-08
1
-0
/
+26
*
i965: Move brw_mark_surface_used() to brw_shader.cpp
Kristian Høgsberg Kristensen
2015-10-08
1
-0
/
+10
[next]