| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | i965: Merge GM45 into the G4X chipset define. | Eric Anholt | 2008-11-02 | 1 | -4/+4 |
| * | i965: Fix check_aperture calls to cover everything needed for the prim at once. | Eric Anholt | 2008-10-28 | 1 | -33/+26 |
| * | intel: Don't keep intel->pClipRects, and instead just calculate it when needed. | Eric Anholt | 2008-10-28 | 1 | -0/+27 |
| * | i965: don't emit state when dri_bufmgr_check_aperture_space fails. | Xiang, Haihao | 2008-10-24 | 1 | -3/+9 |
| * | Revert "Revert "Merge branch 'drm-gem'"" | Dave Airlie | 2008-08-24 | 1 | -79/+39 |
| * | Revert "Merge branch 'drm-gem'" | Dave Airlie | 2008-08-24 | 1 | -39/+79 |
| * | intel-gem: Update to new check_aperture API for classic mode. | Eric Anholt | 2008-08-08 | 1 | -17/+27 |
| * | 965: cleanups to state emission from aperture checking and state ordering. | Eric Anholt | 2008-08-08 | 1 | -19/+0 |
| * | Merge branch 'master' into drm-gem | Ian Romanick | 2008-07-25 | 1 | -4/+4 |
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| | * | i965: official name for GM45 chipset | Xiang, Haihao | 2008-07-08 | 1 | -4/+4 |
| * | | drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes. | Eric Anholt | 2008-07-11 | 1 | -1/+1 |
| * | | [intel-gem] Chase domain flag renaming in the DRM. | Eric Anholt | 2008-06-11 | 1 | -8/+8 |
| * | | GEM: Remove already-disabled PIPE_CONTROL command. | Eric Anholt | 2008-05-07 | 1 | -34/+0 |
| * | | GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags. | Eric Anholt | 2008-05-07 | 1 | -8/+11 |
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| * | i965: fixup depth buffer check | Dave Airlie | 2008-04-18 | 1 | -1/+1 |
| * | i965: initial attempt at fixing the aperture overflow | Dave Airlie | 2008-04-18 | 1 | -13/+24 |
| * | Merge {i915,i965}/intel_context.h as intel/intel_context.h | Kristian Høgsberg | 2008-02-22 | 1 | -0/+2 |
| * | [965] Flush icache on new batch, not just new context. | Eric Anholt | 2008-02-07 | 1 | -1/+1 |
| * | i965: new integrated graphics chipset support | Xiang, Haihao | 2008-01-29 | 1 | -6/+42 |
| * | [intel] Add more cliprect modes to cover other meanings for batch emits. | Eric Anholt | 2008-01-10 | 1 | -5/+5 |
| * | [965] Replace the always_update dirty flag with BRW_NEW_BATCH. | Eric Anholt | 2008-01-09 | 1 | -6/+12 |
| * | [965] Remove drawing rect upload, which is handled (better) by the kernel. | Eric Anholt | 2008-01-09 | 1 | -51/+0 |
| * | [965] Enable EXT_framebuffer_object. | Eric Anholt | 2007-12-20 | 1 | -3/+2 |
| * | [965] Allow draw or depth regions to be NULL. | Eric Anholt | 2007-12-17 | 1 | -30/+41 |
| * | [965] Replace the state cache suballocator with direct dri_bufmgr use. | Eric Anholt | 2007-12-14 | 1 | -54/+44 |
| * | [965] Convert the driver to dri_bufmgr interface and enable TTM. | Eric Anholt | 2007-12-07 | 1 | -83/+60 |
| * | fix bug#9237 | Xiang, Haihao | 2006-12-08 | 1 | -4/+4 |
| * | Emit cliprects in the userspace driver as required, rather than | Keith Whitwell | 2006-10-23 | 1 | -7/+8 |
| * | Make sure bmBufferOffset is called for all active buffers every time | Keith Whitwell | 2006-09-07 | 1 | -2/+5 |
| * | Add Intel i965G/Q DRI driver. | Eric Anholt | 2006-08-09 | 1 | -0/+529 |
