| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | i965: Use intel->gen >= 6 instead of IS_GEN6. | Eric Anholt | 2010-08-22 | 1 | -1/+1 |
| * | i965: Stream out CC unit state. | Eric Anholt | 2010-06-12 | 1 | -2/+2 |
| * | i965: Use the state base address to avoid relocations. | Eric Anholt | 2010-06-11 | 1 | -27/+19 |
| * | i965: Convert the binding table to streamed indirect state. | Eric Anholt | 2010-06-11 | 1 | -16/+12 |
| * | i965: Move Gen6 debugging emit_mi_flush into the Gen6 block. | Eric Anholt | 2010-05-26 | 1 | -2/+2 |
| * | i965: Emit MI_FLUSH before PSP on Ironlake for clip max threads errata. | Eric Anholt | 2010-05-26 | 1 | -0/+7 |
| * | intel: Clean up chipset name and gen num for Ironlake | Zhenyu Wang | 2010-04-21 | 1 | -4/+4 |
| * | i965: Add a couple SNB state packets I saw in other batchbuffer dumps. | Eric Anholt | 2010-02-25 | 1 | -0/+34 |
| * | i965: Hook up remaining Sandybridge state packets besides WM. | Eric Anholt | 2010-02-25 | 1 | -1/+3 |
| * | i965: Set the state base address on Sandybridge. | Eric Anholt | 2010-02-25 | 1 | -1/+14 |
| * | i965: Set up sandybridge binding table pointers but don't enable it yet. | Eric Anholt | 2010-02-25 | 1 | -0/+35 |
| * | i965: Set up sandybridge depthbuffer. | Eric Anholt | 2010-02-25 | 1 | -3/+18 |
| * | i965: Remove DRI1 leftovers from stipple offset handling. | Eric Anholt | 2010-01-26 | 1 | -3/+3 |
| * | intel: Drop more cliprect bookkeeping | Kristian Høgsberg | 2010-01-04 | 1 | -3/+0 |
| * | intel: Drop batchbuffer cliprect_mode tracking | Kristian Høgsberg | 2010-01-04 | 1 | -7/+7 |
| * | Remove leftover __DRI{screen,drawable,context}Private references | Kristian Høgsberg | 2010-01-04 | 1 | -1/+1 |
| * | intel: Replace IS_965 checks with context structure usage. | Eric Anholt | 2009-12-22 | 1 | -2/+2 |
| * | intel: Replace IS_G4X() across the driver with context structure usage. | Eric Anholt | 2009-12-22 | 1 | -5/+5 |
| * | intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync. | Eric Anholt | 2009-12-22 | 1 | -4/+4 |
| * | i965: Flag BRW_NEW_CONTEXT on some context state. | Eric Anholt | 2009-11-13 | 1 | -5/+5 |
| * | i965: validate sf state | Xiang, Haihao | 2009-09-02 | 1 | -0/+1 |
| * | i965: add support for new chipsets | Xiang, Haihao | 2009-07-13 | 1 | -12/+25 |
| * | i965: Fix packed depth/stencil textures to be Y-tiled as well. | Eric Anholt | 2009-06-23 | 1 | -0/+2 |
| * | i965: Disentangle VS constant surface state from WM surface state. | Eric Anholt | 2009-05-06 | 1 | -1/+4 |
| * | i965: checkpoint commit: VS constant buffers | Brian Paul | 2009-04-14 | 1 | -4/+3 |
| * | i965: fix polygon stipple when rendering to FBO | Robert Ellison | 2009-03-12 | 1 | -4/+31 |
| * | i965: Rename CMD_CONST_BUFFER_STATE to the CS_URB_STATE used in the docs. | Eric Anholt | 2009-02-25 | 1 | -1/+1 |
| * | i965: Remove brw->attribs now that we can just always look in the GLcontext. | Eric Anholt | 2009-02-02 | 1 | -8/+11 |
| * | i965: Delete old metaops code now that there are no remaining consumers. | Eric Anholt | 2009-02-02 | 1 | -5/+2 |
| * | i965: Merge GM45 into the G4X chipset define. | Eric Anholt | 2008-11-02 | 1 | -4/+4 |
| * | i965: Fix check_aperture calls to cover everything needed for the prim at once. | Eric Anholt | 2008-10-28 | 1 | -33/+26 |
| * | intel: Don't keep intel->pClipRects, and instead just calculate it when needed. | Eric Anholt | 2008-10-28 | 1 | -0/+27 |
| * | i965: don't emit state when dri_bufmgr_check_aperture_space fails. | Xiang, Haihao | 2008-10-24 | 1 | -3/+9 |
| * | Revert "Revert "Merge branch 'drm-gem'"" | Dave Airlie | 2008-08-24 | 1 | -79/+39 |
| * | Revert "Merge branch 'drm-gem'" | Dave Airlie | 2008-08-24 | 1 | -39/+79 |
| * | intel-gem: Update to new check_aperture API for classic mode. | Eric Anholt | 2008-08-08 | 1 | -17/+27 |
| * | 965: cleanups to state emission from aperture checking and state ordering. | Eric Anholt | 2008-08-08 | 1 | -19/+0 |
| * | Merge branch 'master' into drm-gem | Ian Romanick | 2008-07-25 | 1 | -4/+4 |
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| | * | i965: official name for GM45 chipset | Xiang, Haihao | 2008-07-08 | 1 | -4/+4 |
| * | | drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes. | Eric Anholt | 2008-07-11 | 1 | -1/+1 |
| * | | [intel-gem] Chase domain flag renaming in the DRM. | Eric Anholt | 2008-06-11 | 1 | -8/+8 |
| * | | GEM: Remove already-disabled PIPE_CONTROL command. | Eric Anholt | 2008-05-07 | 1 | -34/+0 |
| * | | GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags. | Eric Anholt | 2008-05-07 | 1 | -8/+11 |
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| * | i965: fixup depth buffer check | Dave Airlie | 2008-04-18 | 1 | -1/+1 |
| * | i965: initial attempt at fixing the aperture overflow | Dave Airlie | 2008-04-18 | 1 | -13/+24 |
| * | Merge {i915,i965}/intel_context.h as intel/intel_context.h | Kristian Høgsberg | 2008-02-22 | 1 | -0/+2 |
| * | [965] Flush icache on new batch, not just new context. | Eric Anholt | 2008-02-07 | 1 | -1/+1 |
| * | i965: new integrated graphics chipset support | Xiang, Haihao | 2008-01-29 | 1 | -6/+42 |
| * | [intel] Add more cliprect modes to cover other meanings for batch emits. | Eric Anholt | 2008-01-10 | 1 | -5/+5 |
| * | [965] Replace the always_update dirty flag with BRW_NEW_BATCH. | Eric Anholt | 2008-01-09 | 1 | -6/+12 |
