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path: root/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
Commit message (Expand)AuthorAgeFilesLines
* i965/generator: Get rid of the ! in the unreachable statementJason Ekstrand2015-04-021-1/+1
* i965: Pass number of components explicitly to brw_untyped_atomic and _surface...Francisco Jerez2015-03-201-5/+4
* i965: Don't disable exec masking for sampler message sends.Francisco Jerez2015-03-201-4/+4
* i965: Factor out logic to build a send message instruction with indirect desc...Francisco Jerez2015-03-201-47/+16
* i965/skl: Break down SIMD16 3-source instructions when required.Kenneth Graunke2015-03-201-0/+6
* i965: Refactor SIMD16-to-2xSIMD8 checks.Neil Roberts2015-03-201-4/+14
* i965/fs: Print spills:fills and number of promoted constants.Matt Turner2015-03-191-8/+14
* i965/fs: Implement SIMD16 dual source blending.Iago Toral Quiroga2015-03-091-3/+12
* Fix invalid extern "C" around header inclusion.Mark Janes2015-03-051-3/+0
* Revert "i965/fs: Remove force_writemask_all assertion for execsize < 8."Matt Turner2015-02-241-0/+1
* i965/fs: Replace ud_reg_to_w() with a more general helper function.Francisco Jerez2015-02-191-24/+3
* i965/fs: Remove force_writemask_all assertion for execsize < 8.Matt Turner2015-02-171-1/+0
* i965/fs: Handle U/UW-type immediates in the generator.Matt Turner2015-02-151-0/+6
* i965/vs/skl: Use vec4 datatypes for message headerBen Widawsky2015-02-111-2/+2
* i965/fs: Implement the WaCMPInstFlagDepClearedEarly work-around.Matt Turner2015-02-041-1/+36
* i965/fs: Apply conditional mod specially to split MAD/LRP.Matt Turner2015-01-231-4/+20
* i965/emit: Do the sampler index adjustment directly in header.0.3Jason Ekstrand2015-01-221-1/+1
* i965: Extract scalar region checking logicBen Widawsky2015-01-201-4/+1
* i965: Pass a shader stage abbreviation to fs_generator().Kenneth Graunke2015-01-141-7/+9
* i965/skl: Always use a header for SIMD4x2 sampler messagesKristian Høgsberg2015-01-081-6/+26
* i965/brw_reg: struct constructor now needs explicit negate and abs values.Andres Gomez2014-12-151-0/+6
* i965: Prepare for using the ATTR register file in the fs backendKristian Høgsberg2014-12-101-2/+0
* i965: Add SIMD8 URB write low-level IR instructionKristian Høgsberg2014-12-101-0/+25
* i965: Remove shader program argument and member from fs_generatorKristian Høgsberg2014-12-101-2/+1
* i965: Set shader name for generator from call siteKristian Høgsberg2014-12-101-18/+13
* i965: Generalize fs_generator furtherKristian Høgsberg2014-12-101-8/+6
* i965/fs: Add support for generating the LINE instruction.Matt Turner2014-12-051-0/+4
* i965: Give compile stats through KHR_debug.Matt Turner2014-12-051-0/+10
* i965/fs: Move brw_file_from_reg() higher in the file.Matt Turner2014-12-051-14/+14
* i965/fs: Make brw_reg_from_fs_reg static and remove prototype.Matt Turner2014-12-051-70/+70
* i965/fs: Treat the FB_WRITE as predicated if we're discarding.Matt Turner2014-12-011-0/+4
* i965: Set prog_data->uses_kill if simulating alpha test via discards.Kenneth Graunke2014-11-271-1/+1
* i965/fs: Pass key->render_to_fbo via src1 of FS_OPCODE_DDY_*.Kenneth Graunke2014-11-271-7/+2
* i965/fs: Handle derivative quality decisions in the front-end.Kenneth Graunke2014-11-271-30/+15
* i965/fs: Add vector float immediate infrastructure.Matt Turner2014-11-251-0/+3
* i965: Don't overwrite the math function with conditional mod.Matt Turner2014-11-241-1/+2
* i965: Assert that math instructions don't have conditional mod.Matt Turner2014-11-241-0/+2
* i965/fs: Move ip_record class to its one use.Matt Turner2014-11-211-0/+12
* i965: Combine offset/texture_offset fields.Matt Turner2014-11-211-3/+3
* i965: Refactor fs_generator APIKristian Høgsberg2014-11-141-30/+13
* i965/fs: Use instruction execution sizes when generating scratch reads/writesJason Ekstrand2014-10-271-4/+4
* i965/fs: Use the actual regsister width in brw_reg_from_fs_regJason Ekstrand2014-10-021-0/+13
* i965/fs: Emit compressed BFI2 instructions on Gen > 7.Matt Turner2014-09-301-1/+1
* i965/fs: Add a an optional source to the FS_OPCODE_FB_WRITE instructionJason Ekstrand2014-09-301-20/+17
* i965/fs: Use the GRF for UNTYPED_SURFACE_READ instructionsJason Ekstrand2014-09-301-3/+4
* i965/fs: Use the GRF for UNTYPED_ATOMIC instructionsJason Ekstrand2014-09-301-4/+4
* i965/fs: Use the instruction execution size directly for texture generationJason Ekstrand2014-09-301-3/+10
* i965/fs: Use instruction execution sizes to set compression stateJason Ekstrand2014-09-301-6/+19
* i965/fs_reg: Allocate double the number of vgrfs in SIMD16 modeJason Ekstrand2014-09-301-9/+2
* i965/brw_reg: Add a firsthalf function and use it in the generatorJason Ekstrand2014-09-301-29/+38
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