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mesa
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drivers
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dri
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i965
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brw_eu_emit.c
Commit message (
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Author
Age
Files
Lines
*
i965: implement OPCODE_TRUNC (round toward zero) on vertex path.
Brian Paul
2009-01-05
1
-0
/
+1
*
i965: Merge GM45 into the G4X chipset define.
Eric Anholt
2008-11-02
1
-8
/
+8
*
Fix for 58dc8b7: dest regions must not use HorzStride 0 in ExecSize 1
Keith Packard
2008-11-01
1
-0
/
+4
*
i965: support destination horiz strides in align1 access mode.
Gary Wong
2008-10-31
1
-2
/
+2
*
i965: force thread switch after IF/ELSE/ENDIF. partial fix for #16882.
Xiang, Haihao
2008-08-29
1
-0
/
+5
*
i965: mask control for BREAK/CONT/DO/WHILE. partial fix fox #16882
Xiang, Haihao
2008-08-29
1
-4
/
+4
*
i965: official name for GM45 chipset
Xiang, Haihao
2008-07-08
1
-8
/
+8
*
i965: new integrated graphics chipset support
Xiang, Haihao
2008-01-29
1
-10
/
+21
*
i965: The jump instruction count is added
Xiang, Haihao
2007-11-27
1
-1
/
+1
*
support continue, fix conditional
Zou Nan hai
2007-09-29
1
-0
/
+14
*
support branch and loop in pixel shader
Zou Nan hai
2007-06-21
1
-5
/
+23
*
Initial 965 GLSL support
Zou Nan hai
2007-04-12
1
-1
/
+1
*
i965: Avoid branch instructions while in single program flow mode.
Eric Anholt
2007-01-06
1
-55
/
+100
*
fix a couple of cases where a message reg is used as an instruction source.
Keith Whitwell
2006-09-01
1
-0
/
+4
*
Add Intel i965G/Q DRI driver.
Eric Anholt
2006-08-09
1
-0
/
+999