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| * | i915: replace MESA_FORMAT_Z24_S8 with MESA_FORMAT_S8_Z24Brian Paul2009-10-211-2/+2
| | | | | | | | | | | | And change parameter type.
| * | mesa: remove a bunch of gl_renderbuffer fieldsBrian Paul2009-10-081-1/+1
| | | | | | | | | | | | | | | | | | _ActualFormat is replaced by Format (MESA_FORMAT_x). ColorEncoding, ComponentType, RedBits, GreenBits, BlueBits, etc. are all replaced by MESA_FORMAT_x queries.
| * | drivers: don't include texformat.hBrian Paul2009-10-055-5/+0
| | | | | | | | | | | | And remove other unneeded #includes while we're at it.
| * | mesa: replace gl_texture_format with gl_formatBrian Paul2009-09-304-8/+8
| | | | | | | | | | | | | | | | | | Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum. ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x. gl_texture_format will go away next.
* | | i915: Fix driver for the miptree x/y offset changes.Eric Anholt2009-10-272-4/+20
| | | | | | | | | | | | Bug #24734.
* | | Merge branch 'mesa_7_6_branch'Brian Paul2009-10-221-2/+6
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| * | intel: Fallback field is a bitmask, use GLbitfieldBrian Paul2009-10-221-2/+6
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* | mesa: lift default symlinks target into Makefile.templateBrian Paul2009-10-161-1/+0
| | | | | | | | Driver Makefiles can still add symlink dependencies/rules if needed.
* | intel: pass zslice to intel_miptree_image_offset()Brian Paul2009-10-122-6/+4
| | | | | | | | | | This lets us get rid of intel_miptree_depth_offsets() and simplify all of the calling code.
* | i915: Add optional support for ARB_fragment_shader under a driconf option.Eric Anholt2009-10-011-0/+1
| | | | | | | | | | | | | | | | | | | | Other vendors have enabled ARB_fragment_shader as part of OpenGL 2.0 enablement even on hardware like the 915 with no dynamic branching or dFdx/dFdy support. But for now we'll leave it disabled because we don't do any flattening of ifs or loops, which is rather restrictive. This support is not complete, and may be unstable depending on your shaders. It passes 10/15 of the piglit glsl tests, but hangs on glean glsl1.
* | i915: Add support or fallbacks for GLSL fragment shader opcodes.Eric Anholt2009-10-011-4/+158
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* | i915: Add support for varying inputs.Eric Anholt2009-10-012-2/+23
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* | i915: Enable ARB_vertex_shader for both i915 and i830.Eric Anholt2009-10-011-0/+2
| | | | | | | | | | | | Since the TNL is all done in software anyway, it should be the same to the user who's probably using ARB_vertex_program otherwise, but gives them a nicer programming environment.
* | i915: Increase maximum program size to the hardware limits.Eric Anholt2009-10-012-7/+16
| | | | | | | | | | | | This fixes potential heap trashing if the program of choice exceeds limits, and fixes the native instructions limit being lower than what can be used by valid programs.
* | i915: Update and translate the fragment program along with state updates.Eric Anholt2009-10-014-14/+26
| | | | | | | | | | | | | | Previously, we were doing it in the midst of the pipeline run, which gave an opportunity to enable/disable fallbacks, which is certainly the wrong time to be doing so. This manifested itself in a NULL dereference for PutRow after transitioning out of a fallback during a run_pipeline in glean glsl1.
* | Revert "i915: don't validate PS program when falling back to software"Eric Anholt2009-10-011-2/+1
| | | | | | | | | | | | | | This reverts commit e7044d552c6d16389447880b8744a51de1cf0199. It prevented the driver from ever recovering from a software fallback due to a program error. The original bug it claimed to fix doesn't appear to exist post-revert.
* | i915: Bail when the fragment program has too many total instructions.Eric Anholt2009-10-011-0/+10
| | | | | | | | Previously, we'd go trashing the heap.
* | i915: Let i915_program_error take a format string, and don't use _mesa_problem.Eric Anholt2009-10-013-12/+24
| | | | | | | | | | | | It's misleading to report things like the program having too many native instructions as a Mesa implementation error, when the program may just be too big for the hardware.
* | intel: Drop my generatemipmap code in favor of the new shared code.Eric Anholt2009-09-282-2/+0
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* intel: Add support for ARB_sync.Eric Anholt2009-09-032-0/+2
| | | | | We currently weasel out of supporting the timeout parameter, but otherwise this extension looks ready, and should make the common case happy.
* i915: Fix undefined symbol as of eabe12df44a41e97fb5736959e8864ddbd01be14Eric Anholt2009-08-271-0/+1
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* ARB prog: Change handling of program parameter limitsIan Romanick2009-08-261-0/+3
| | | | | | | | | | | | | | | | | Several changes are made to program parameter limits. Several of the non-NATIVE limits are set higher. All of the NATIVE limits are set to zero in the core Mesa code. Each driver must set the actual value in its context creation routine. If the NATIVE value remains zero, this indicates that hardware shaders may not be supported. Each of the preceeding changes matches the bahavior of Apple's shader assembler, so it seems safe. Finally, we limit the value of MaxEnvParams to be no greater than MaxNativeAttribs. At least one case has been found where an application does the wrong thing if MaxNativeAttribs < MaxEnvParams. See also bugzilla #23490.
* intel: Add support for EXT_provoking_vertex.Eric Anholt2009-08-049-20/+115
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* i915: Add support for EXT_stencil_two_side and ATI_separate_stencil.Eric Anholt2009-07-295-54/+113
| | | | Passes tests/stencil_twoside and glean/stencil2.
* intel: Move note_unlock() implementation to the one place it's needed.Eric Anholt2009-06-292-15/+0
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* intel: Make LOCK_HARDWARE recursive to avoid hand-rolling recursiveness.Eric Anholt2009-06-291-5/+2
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* intel: Move intel_pixel_read.c to shared for use with i965.Eric Anholt2009-06-191-306/+1
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* i915: Add an option for testing the effect of early Z in classic mode.Eric Anholt2009-06-092-0/+10
| | | | | | The early Z stuff is supposed to be unsafe without some more work in the enable/disable path (in particular, how do we want to get it disabled on the way out to the X Server?), but at the moment is 6% in OA.
* intel: Add support for tiled textures.Eric Anholt2009-06-041-20/+27
| | | | | | | | | | This is about a 30% performance win in OA with high settings on my GM45, and experiments with 915GM indicate that it'll be around a 20% win there. Currently, 915-class hardware is seriously hurt by the fact that we use fence regs to control the tiling even for 3D instructions that could live without them, so we spend a bunch of time waiting on previous rendering in order to pull fences off. Thus, the texture_tiling driconf option defaults off there for now.
* i915: Don't rely on fence regs when we don't have to.Eric Anholt2009-06-046-62/+39
| | | | | We're on the way to telling the kernel about when we need fence regs on our objects or not, and this will cut the number of places needing them.
* i915: Remove some long-dead i830 code.Eric Anholt2009-06-041-20/+0
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* i915: Restore the Viewport and DepthRange functions on 8xx.Eric Anholt2009-05-261-0/+21
| | | | | | | Fixes failed viewport updates on glxgears (and other apps) resize since e41780fedc2c1f22b43118da30a0103fa68b769f. Bug #20473.
* i915: Fix 945 cube map layout for the small mipmaps along the bottom.Steinar H. Gunderson2009-05-151-2/+14
| | | | Bug #21691.
* i915: Only use the new 945 cube layout for compressed textures.Eric Anholt2009-05-151-1/+4
| | | | | | | | | The docs actually explain this, but not in a terribly clear manner. This nearly fixes the piglit cubemap testcase, except that something's going wrong with the nearest filtering at 2x2 sizes in the testcase. Looks good by visual inspection, though. Bug #21692
* i915: Fix driver after HW glGenerateMipmap commit.Eric Anholt2009-05-121-0/+1
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* intel: Add a metaops version of glGenerateMipmapEXT/SGIS_generate_mipmaps.Eric Anholt2009-05-081-0/+1
| | | | | | | In addition to being HW accelerated, it avoids the incorrect (black) rendering of the mipmaps that SW was doing in fbo-generatemipmap. Improves the performance of the mipmap generation and drawing in fbo-generatemipmap by 30%.
* Merge branch 'const-buffer-changes'Brian Paul2009-05-011-1/+1
|\ | | | | | | | | | | | | | | Conflicts: src/mesa/drivers/dri/i965/brw_curbe.c src/mesa/drivers/dri/i965/brw_vs_emit.c src/mesa/drivers/dri/i965/brw_wm_glsl.c
| * i915: check the new _NEW_PROGRAM_CONSTANT flagBrian Paul2009-04-221-1/+1
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* | i915: fix fix for anisotropic filteringRoland Scheidegger2009-04-231-2/+7
| | | | | | | | forgot to commit the changes to actually support 4x aniso filtering...
* | intel: fix max anisotropy supportedRoland Scheidegger2009-04-222-0/+4
|/ | | | | | i915 actually supports up to 4 (according to header file - not tested), i965 up to 16 (code already handled this but slightly broken), so don't use 2 for all chips, even though angular dependency is very high.
* Merge branch 'register-negate'Brian Paul2009-04-161-5/+5
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| * mesa: merge the prog_src_register::NegateBase and NegateAbs fieldsBrian Paul2009-04-141-5/+5
| | | | | | | | | | | | There's really no need for two negation fields. This came from the GL_NV_fragment_program extension. The new, unified Negate bitfield applies after the absolute value step.
* | i915: Remove dead i830TexEnv and i915TexEnv.Eric Anholt2009-04-165-182/+0
| | | | | | | | | | These LOD bias updates are covered by the texture state uploads in *_texstate.c now.
* | intel: Add support for argb1555, argb4444 FBOs and fix rgb565 fbo readpixels.Eric Anholt2009-04-162-11/+47
| | | | | | | | | | | | Also enable them all regardless of screen bpp, as 32 bpp what I've been testing against, and haven't been able to detect any screen bpp-specific troubles with them.
* | i915: Use DEBUG_WM (like 965) for printing the fragment program out.Eric Anholt2009-04-151-4/+2
|/ | | | | This is nice when paired with INTEL_DEBUG=batch for debugging what's going out to the hardware.
* dri: use BorderColor instead of _BorderChanBrian Paul2009-04-012-12/+24
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* Fix DRI2 accelerated EXT_texture_from_pixmap with GL_RGB format.Eric Anholt2009-03-202-6/+15
| | | | | | | | | | | | | | This requires upgrading the interface so that the argument to glXBindTexImageEXT isn't just dropped on the floor. Note that this only fixes the accelerated path on Intel, as Mesa's texture format support is missing x8r8g8b8 support (right now, GL_RGB textures get uploaded as a8r8gb8, but in this case we're not doing the upload so we can't really work around it that way). Fixes bugs with compositors trying to use shaders that use alpha channels, on windows without a valid alpha channel. Bug #19910 and likely others as well. Reviewed-by: Ian Romanick <[email protected]>
* i915: move declarations before codeBrian Paul2009-03-122-4/+4
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* i965: add software fallback for conformant 3D textures and GL_CLAMPRobert Ellison2009-03-041-2/+2
| | | | | | | | | | | | | | | | | The i965 hardware cannot do GL_CLAMP behavior on textures; an earlier commit forced a software fallback if strict conformance was required (i.e. the INTEL_STRICT_CONFORMANCE environment variable was set) and 2D textures were used, but it was somewhat flawed - it could trigger the software fallback even if 2D textures weren't enabled, as long as one texture unit was enabled. This fixes that, and adds software fallback for GL_CLAMP behavior with 1D and 3D textures. It also adds support for a particular setting of the INTEL_STRICT_CONFORMANCE environment variable, which forces software fallbacks to be taken *all* the time. This is helpful with debugging. The value is: export INTEL_STRICT_CONFORMANCE=2
* mesa: rename, reorder FRAG_RESULT_x tokensBrian Paul2009-02-281-2/+2
| | | | | | | s/FRAG_RESULT_DEPR/FRAG_RESULT_DEPTH/ s/FRAG_RESULT_COLR/FRAG_RESULT/COLOR/ Remove FRAG_RESULT_COLH (NV half-precision) output since we never used it. Next, we might merge the COLOR and DATA outputs (COLOR0, COLOR1, etc).
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