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* intel: Fix aux map alignments on 32-bit builds.Kenneth Graunke2020-01-231-4/+4
* util: Remove tmp argument from BITSET_FOREACH_SET macroMatt Turner2020-01-231-6/+3
* anv: Enable SPV_INTEL_shader_integer_functions2 and VK_INTEL_shader_integer_f...Ian Romanick2020-01-232-0/+2
* i965: Enable INTEL_shader_integer_functions2 on Gen8+Ian Romanick2020-01-231-0/+2
* intel/fs: Implement support for NIR opcodes for INTEL_shader_integer_functions2Ian Romanick2020-01-231-0/+67
* intel/fs: Add SHADER_OPCODE_[IU]SUB_SAT pseudo-opsIan Romanick2020-01-233-0/+101
* intel/fs: Don't lower integer multiplies that don't need loweringIan Romanick2020-01-231-0/+11
* intel/compiler: Move Gen4/5 rounding to visitorMatt Turner2020-01-224-37/+28
* intel/compiler: Return early if read() failedEmmanuel Gil Peyrot2020-01-221-1/+4
* intel/perf: adapt to platforms like Solaris without d_type in struct direntAlan Coopersmith2020-01-221-5/+20
* anv: ensure prog params are initialized with 0sLionel Landwerlin2020-01-221-1/+1
* intel/compiler: Fix array bounds warning on GCC 10.Timur Kristóf2020-01-221-0/+2
* intel/compiler: Test compaction on Gen <= 12Matt Turner2020-01-221-1/+1
* intel/compiler: Validate fuzzed instructionsMatt Turner2020-01-223-1/+7
* intel/compiler: Add unit tests for new EU validation checksMatt Turner2020-01-221-0/+396
* intel/compiler: Validate some instruction word encodingsMatt Turner2020-01-221-10/+84
* intel/compiler: Factor out brw_validate_instruction()Matt Turner2020-01-221-26/+35
* intel/compiler: Handle invalid compacted immediatesMatt Turner2020-01-221-1/+15
* intel/compiler: Handle invalid inputs to brw_reg_type_to_*()Matt Turner2020-01-221-0/+6
* intel/compiler: Split hw_type tablesMatt Turner2020-01-221-23/+116
* intel/compiler: Add a INVALID_{,HW_}REG_TYPE macrosMatt Turner2020-01-223-5/+8
* intel/compiler: Add NF some more placesMatt Turner2020-01-222-0/+5
* intel/compiler: Limit compaction unit tests to specific gensMatt Turner2020-01-221-9/+18
* intel/compiler: Don't disassemble align1 3-src operands on Gen < 10Matt Turner2020-01-221-0/+12
* intel/compiler: Split has_64bit_types into float/intMatt Turner2020-01-228-27/+80
* intel/compiler: Extract GEN_* macros into separate fileMatt Turner2020-01-222-37/+63
* intel/compiler: Use ARRAY_SIZE()Matt Turner2020-01-221-22/+22
* intel/fs: Don't emit control barrier if only one thread is usedCaio Marcelo de Oliveira Filho2020-01-211-0/+9
* intel/fs: Don't emit fence for shared memory if only one thread is usedCaio Marcelo de Oliveira Filho2020-01-211-13/+23
* intel/fs: Add workgroup_size() helperCaio Marcelo de Oliveira Filho2020-01-212-0/+10
* intel/fs: Add FS_OPCODE_SCHEDULING_FENCECaio Marcelo de Oliveira Filho2020-01-213-0/+13
* anv: Drop some workarounds that are no longer necessaryKenneth Graunke2020-01-211-61/+0
* anv: don't report error with other vendor DRM devicesLionel Landwerlin2020-01-211-4/+11
* anv: initialize clear_color_is_zero_oneTapani Pälli2020-01-211-0/+5
* anv: Allow enumerating multiple physical devicesJason Ekstrand2020-01-202-72/+75
* anv: Re-arrange physical_device_initJason Ekstrand2020-01-201-23/+27
* anv: Drop separate chipset_id fieldsJason Ekstrand2020-01-203-13/+9
* anv: Move the physical device dispatch table to anv_instanceJason Ekstrand2020-01-203-40/+24
* anv: Drop the instance pointer from anv_deviceJason Ekstrand2020-01-205-13/+16
* anv: Stop allocating WSI event fences off the instanceJason Ekstrand2020-01-201-2/+2
* anv: Take a device in anv_perf_warnJason Ekstrand2020-01-204-15/+15
* anv: Take an anv_device in vk_errorfJason Ekstrand2020-01-208-82/+69
* anv: Add an anv_physical_device field to anv_deviceJason Ekstrand2020-01-2024-128/+90
* anv: Canonicalize buffer formats for image/buffer copiesJason Ekstrand2020-01-201-20/+42
* anv/blorp: Rename buffer image stride parametersJason Ekstrand2020-01-201-9/+10
* anv: add assert for isl_mod_info in choose_isl_tiling_flagsTapani Pälli2020-01-201-0/+1
* anv: fix assert in GetImageDrmFormatModifierPropertiesEXTTapani Pälli2020-01-201-1/+1
* isl/gen12: add reminder comment about missing WA with 3D surfacesTapani Pälli2020-01-201-0/+13
* intel/fs: Switch to standard vector layout for barycentrics at optimization t...Francisco Jerez2020-01-174-58/+30
* intel/fs: Introduce barycentric layout lowering pass.Francisco Jerez2020-01-173-9/+73
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