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* intel/fs: Correctly handle multiply of fsign with a source modifierIan Romanick2020-02-191-0/+10
* anv: Drop anv_image.c:get_surface()Chad Versace2020-02-191-10/+6
* intel/compiler: Do not qsort zero sized arrayDanylo Piliaiev2020-02-191-2/+4
* brw_fs: Avoid zero size vlaDanylo Piliaiev2020-02-191-1/+1
* brw_nir: Cast bitshift to unsignedDanylo Piliaiev2020-02-191-1/+1
* intel/gen12: Take into account opcode when decoding SWSBCaio Marcelo de Oliveira Filho2020-02-182-3/+7
* anv: Advertise VK_KHR_shader_non_semantic_infoCaio Marcelo de Oliveira Filho2020-02-181-0/+1
* intel/fs/gen7+: Implement discard/demote for SIMD32 programs.Francisco Jerez2020-02-142-8/+14
* intel/fs: Return consistent UW types from sample_mask_reg() in fragment shaders.Francisco Jerez2020-02-141-3/+2
* intel/fs: Refactor predication on sample mask into helper function.Francisco Jerez2020-02-141-34/+44
* intel/fs/gen7+: Swap sample mask flag register and FIND_LIVE_CHANNEL temporary.Francisco Jerez2020-02-144-13/+18
* intel/fs: Use helper for discard sample mask flag subregister number.Francisco Jerez2020-02-144-5/+16
* intel/fs: Make sample_mask_reg() local to brw_fs.cpp and use it in more places.Francisco Jerez2020-02-142-24/+28
* intel/fs/gen11: Work around dual-source blending hangs in combination with SI...Francisco Jerez2020-02-141-0/+12
* intel/fs: Set src0 alpha present bit in header when provided in message payload.Francisco Jerez2020-02-143-15/+6
* intel/fs/gen12: Workaround data coherency issues due to broken NoMask control...Francisco Jerez2020-02-141-34/+100
* intel/fs/gen12: Fixup/simplify SWSB annotations of SIMD32 scratch writes.Francisco Jerez2020-02-141-7/+3
* intel/fs/gen12: Workaround unwanted SEND execution due to broken NoMask contr...Francisco Jerez2020-02-142-0/+150
* intel/fs: Add virtual instruction to load mask of live channels into flag reg...Francisco Jerez2020-02-145-2/+22
* intel/fs/gen7: Fix fs_inst::flags_written() for SHADER_OPCODE_FIND_LIVE_CHANNEL.Francisco Jerez2020-02-141-1/+2
* intel/fs/cse: Make HALT instruction act as CSE barrier.Francisco Jerez2020-02-141-0/+10
* intel/tools: Update aubinator_error_decode.Rafael Antognolli2020-02-131-0/+2
* intel/isl: Switch to R8_UNORM format for compatiblitySagar Ghuge2020-02-131-0/+9
* intel/isl: Move get_format_encoding function to islSagar Ghuge2020-02-133-73/+75
* anv: Reject modifiers on depth/stencil formatsJason Ekstrand2020-02-131-3/+7
* anv: Respect ISL_SURF_USAGE_DISABLE_AUX_BIT in make_surface()Chad Versace2020-02-121-3/+4
* anv: Clarify behavior of anv_image_aspect_to_plane()Chad Versace2020-02-121-0/+6
* anv: Delete anv_image::ccs_e_compatibleChad Versace2020-02-122-14/+10
* Rename nir_lower_constant_initializers to nir_lower_variable_initalizersArcady Goldmints-Orlov2020-02-121-2/+2
* anv: Rename param make_surface::dev to deviceChad Versace2020-02-111-22/+22
* anv: Drop unused anv_image_get_surface_for_aspect_mask()Chad Versace2020-02-112-63/+0
* intel/vec4: fix valgrind errors with vf_values arrayTapani Pälli2020-02-071-1/+2
* anv: No-op submit and wait calls when no_hw is setJason Ekstrand2020-02-061-0/+12
* anv: set MOCS on push constantsLionel Landwerlin2020-02-061-1/+7
* intel: Load the driver even if I915_PARAM_REVISION is not found.Rafael Antognolli2020-02-061-1/+1
* isl: Fix the android build.Kenneth Graunke2020-02-051-1/+2
* intel/genxml: Drop "reserved" enumKenneth Graunke2020-02-051-1/+0
* glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.Eric Anholt2020-02-051-57/+3
* intel/isl: Move iris's pipe-to-isl format function to isl.Eric Anholt2020-02-052-0/+302
* intel/fs: Don't count integer instructions as being possibly coissueIan Romanick2020-02-051-1/+8
* anv: implement gen12 post sync pipe control workaroundLionel Landwerlin2020-02-051-1/+5
* anv: implement gen9 post sync pipe control workaroundLionel Landwerlin2020-02-053-0/+39
* anv/blorp: Use the correct size for vkCmdCopyBufferToImageJason Ekstrand2020-02-021-0/+8
* intel/gen12+: Set way_size_per_bank to 4Anuj Phogat2020-01-311-1/+1
* intel/gen12+: Reserve 4KB of URB space per bank for Compute EngineAnuj Phogat2020-01-311-1/+19
* intel/fs: Write the address register with NoMask for MOV_INDIRECTJason Ekstrand2020-01-311-0/+9
* intel/tools: Handle strides better when dumping buffersJason Ekstrand2020-01-311-2/+5
* intel/disasm: SEND has two sources on Gen12+Jason Ekstrand2020-01-311-2/+4
* intel/eu/validate: Don't validate regions of sendsJason Ekstrand2020-01-311-3/+3
* anv: Always fill out the AUX table even if CCS is disabledJason Ekstrand2020-01-303-16/+18
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