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* intel/isl: Switch to R8_UNORM format for compatiblitySagar Ghuge2020-02-131-0/+9
* intel/isl: Move get_format_encoding function to islSagar Ghuge2020-02-132-0/+73
* intel/isl: Move iris's pipe-to-isl format function to isl.Eric Anholt2020-02-052-0/+302
* isl: add gen12 comment about CCS for linear tilingLionel Landwerlin2020-01-261-0/+10
* isl: drop CCS row pitch requirement for linear surfacesLionel Landwerlin2020-01-261-15/+21
* intel: Implement Gen12 workaround for array textures of size 1Lionel Landwerlin2020-01-261-1/+5
* intel/isl: Allow CCS_E on more formatsJason Ekstrand2020-01-251-23/+4
* isl: Add a helper for calculating subimage memory rangesJason Ekstrand2020-01-252-0/+71
* intel/isl: Add a hack for the Gen12 A0 texture buffer bugJason Ekstrand2020-01-241-0/+19
* intel/isl: Plumb devinfo into isl_genX(buffer_fill_state_s)Jason Ekstrand2020-01-243-3/+3
* anv: Use isl_aux_state for HiZ resolvesJason Ekstrand2020-01-241-0/+14
* isl/gen12: add reminder comment about missing WA with 3D surfacesTapani Pälli2020-01-201-0/+13
* intel/isl: Add MOCS settings to isl_device.Rafael Antognolli2019-11-122-0/+57
* intel/isl: Allow stencil buffer to support compression on Gen12+Sagar Ghuge2019-10-291-2/+3
* intel: Track stencil aux usage on Gen12+Sagar Ghuge2019-10-292-0/+8
* intel/isl: Support lossless compression with multisamplesSagar Ghuge2019-10-281-5/+1
* intel/isl: Don't reconfigure aux surfaces for MCSSagar Ghuge2019-10-281-0/+3
* intel: Fix and use HIZ_CCS write through modeNanley Chery2019-10-281-0/+6
* isl: Add isl_surf_supports_hiz_ccs_wt()Nanley Chery2019-10-282-0/+18
* intel: Support HIZ_CCS in isl_surf_get_ccs_surfNanley Chery2019-10-282-6/+36
* isl: Reduce assertions during aux surf creationNanley Chery2019-10-281-5/+15
* intel: Enable CCS_E for R24_UNORM_X8_TYPELESS on TGL+Nanley Chery2019-10-281-1/+1
* intel: Use 3DSTATE_DEPTH_BUFFER::ControlSurfaceEnableNanley Chery2019-10-281-1/+1
* intel/isl: Support HIZ_CCS in emit_depth_stencil_hizJason Ekstrand2019-10-281-2/+10
* intel: Use RENDER_SURFACE_STATE::DepthStencilResourceNanley Chery2019-10-281-0/+5
* intel: Update alignment restrictions for HiZ surfaces.Jordan Justen2019-10-281-1/+7
* intel: Enable CCS_E for some formats on Gen12Nanley Chery2019-10-281-29/+44
* isl: Redefine the CCS layout for Gen12Nanley Chery2019-10-285-15/+136
* isl: Add and use isl_tiling_flag_to_enum()Nanley Chery2019-10-282-2/+9
* isl/drm: Map HiZ and CCS tilings to YNanley Chery2019-10-281-2/+2
* intel/isl: Update surf_fill_state for gen12Jason Ekstrand2019-10-281-4/+22
* intel/isl/fill_state: Separate aux_mode handling from aux_surfJason Ekstrand2019-10-281-20/+41
* intel/isl: Add new aux modes available on gen12Jason Ekstrand2019-10-281-1/+33
* isl: Round up some pitches to 512B for Gen12's CCSNanley Chery2019-10-281-6/+14
* isl: Disable CCS_D on Gen12+Nanley Chery2019-10-281-2/+4
* isl/gen12: 64k surface alignmentJordan Justen2019-10-281-0/+4
* intel/isl: Add isl_aux_usage_has_ccsJason Ekstrand2019-10-171-0/+7
* intel/isl: Add R10G10B10_FLOAT_A2_UNORM formatJordan Justen2019-10-173-0/+3
* intel/isl: Add gen12 depth/stencil surface alignmentsJordan Justen2019-10-174-2/+121
* intel/isl: Select Y-tiling for stencil on gen12Jason Ekstrand2019-10-171-4/+7
* intel/genxml: Remove W-tiling on gen12Jason Ekstrand2019-10-171-0/+3
* intel/genxml,isl: Add gen12 stencil buffer changesJordan Justen2019-10-171-1/+22
* intel/genxml,isl: Add gen12 depth buffer changesJordan Justen2019-10-171-1/+1
* intel/genxml,isl: Add gen12 render surface state changesJordan Justen2019-10-171-2/+10
* intel/isl: set vertical surface alignment on null surfacesLionel Landwerlin2019-10-051-0/+13
* intel/isl: set surface array appropriatelyLionel Landwerlin2019-10-051-1/+1
* intel/isl: Set null surface format to R32_UINTLionel Landwerlin2019-10-051-1/+6
* intel/isl/icl: Use halign 8 instead of 4 hw workaroundAnuj Phogat2019-10-031-8/+21
* isl: Drop WaDisableSamplerL2BypassForTextureCompressedFormats on Gen11Kenneth Graunke2019-09-201-1/+1
* intel/isl: Build gen12 using gen11 code pathsJordan Justen2019-08-283-1/+7
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