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* intel/isl: Add a drm_modifier_get_default_aux_state helperJason Ekstrand2017-09-181-0/+20
* intel/isl: Mark functions used conditionally as UNUSEDMatt Turner2017-08-291-1/+1
* intel/isl: Explicitly cast between different enumsMatt Turner2017-08-291-8/+9
* intel/isl: Remove 'inline' keywordsMatt Turner2017-08-293-4/+4
* isl: Add a null surface fill function.Kenneth Graunke2017-08-194-0/+40
* intel/isl: Replace switch statements of doom with a macroJason Ekstrand2017-08-171-96/+39
* intel/isl: Reduce header file duplicationJason Ekstrand2017-08-174-101/+78
* i965: Pretend that CCS modified images are two planesBen Widawsky2017-08-141-0/+6
* intel/isl: Add support for I915_FORMAT_MOD_Y_TILED_CCSJason Ekstrand2017-08-141-0/+7
* isl: Validate row pitch of stencil surfaces.Kenneth Graunke2017-08-101-2/+7
* intel/isl: Don't align the height of the last array sliceJason Ekstrand2017-08-071-1/+2
* intel/isl: Stop padding surfacesJason Ekstrand2017-08-071-117/+2
* intel/isl: Add some sanity checks for compressed surfacesJason Ekstrand2017-07-221-0/+18
* intel/isl: Add a helper to get a subimage surfaceJason Ekstrand2017-07-222-0/+64
* intel/isl: Add a helper for determining if a color is 0/1Jason Ekstrand2017-07-222-0/+30
* intel/isl/format: Add an srgb_to_linear helperJason Ekstrand2017-07-222-1/+53
* intel/isl/format: Dedent the template in gen_format_layout.pyJason Ekstrand2017-07-221-58/+57
* intel/isl: Add an aux state for "partial clear"Jason Ekstrand2017-07-221-35/+53
* intel/isl: Add surface state clear value informationNanley Chery2017-07-222-0/+13
* intel/isl: Tighten up restrictions for CCS on gen7Jason Ekstrand2017-07-221-7/+23
* intel/isl/gen7: Don't allow multisampled surfaces with valign2Topi Pohjolainen2017-07-221-19/+23
* intel/isl/gen7: Allow msaa with signed integer formatsTopi Pohjolainen2017-07-221-2/+3
* intel/isl/gen7: Allow msaa with 128-bit formatsTopi Pohjolainen2017-07-221-4/+7
* intel/isl: Allow 1D surfaces with compressed formatsTopi Pohjolainen2017-07-221-1/+1
* intel/isl: Align non-tiled horizontally by cache lineTopi Pohjolainen2017-07-221-1/+15
* intel/isl/gen4: Represent cube maps with 3D layoutTopi Pohjolainen2017-07-201-6/+35
* intel/isl: Add i915 to isl_tiling converterTopi Pohjolainen2017-07-202-0/+20
* intel/isl: Take 3D surfaces into account in image paramsTopi Pohjolainen2017-07-181-2/+6
* intel/isl: Add a row_pitch parameter to surf_get_ccs_surfJason Ekstrand2017-07-172-2/+5
* isl: use 64bit arithmetic to compute sizeLionel Landwerlin2017-07-131-2/+2
* intel/isl: Add a helper to convert tilings from ISL to i915Jason Ekstrand2017-07-122-0/+28
* intel/isl: Add basic modifier introspectionJason Ekstrand2017-07-122-0/+81
* Revert "intel/isl: Only create a CCS buffer if the image supports rendering"Nanley Chery2017-07-071-1/+1
* intel/isl: Only create a CCS buffer if the image supports renderingNanley Chery2017-06-261-1/+1
* intel/isl: Limit CCS to one level and layer on gen7Nanley Chery2017-06-261-2/+7
* intel: compiler/i965: fix is_broxton checksLionel Landwerlin2017-06-201-2/+2
* intel/isl/gen6: Allow arrayed stencilTopi Pohjolainen2017-06-171-1/+0
* intel/isl: Add the maximum surface size limitAnuj Phogat2017-06-161-0/+22
* intel/isl: Use uint64_t to store total surface sizeAnuj Phogat2017-06-162-2/+3
* intel/isl: Properly set SeparateStencilBufferEnable on gen5-6Jason Ekstrand2017-06-141-3/+10
* i965/cnl: Enable CCS_E and RT support for few formatsAnuj Phogat2017-06-091-9/+9
* i965/cnl: Reformat surface_format_info table to accomodate gen10+Anuj Phogat2017-06-091-263/+263
* i965/cnl: Handle gen10 in switch cases across the driverAnuj Phogat2017-06-091-0/+9
* i965/cnl: Add gen10 specific function declarationsAnuj Phogat2017-06-091-0/+12
* intel/isl: Add an enum for describing auxiliary compression stateJason Ekstrand2017-06-071-0/+169
* i965/miptree: Store fast clear colors in an isl_color_valueJason Ekstrand2017-06-071-0/+19
* intel/isl: Add a helper for getting the byte/tile offset of a subimageJason Ekstrand2017-06-012-0/+60
* intel/isl: Make get_intratile_offset_el take the element size in bitsJason Ekstrand2017-06-012-8/+5
* intel/isl: Add a new layout for HiZ and stencil on Sandy BridgeJason Ekstrand2017-06-012-5/+197
* intel/isl: Generate phys_total_el from isl_calc_phys_extentJason Ekstrand2017-06-011-68/+97
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