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* intel/isl: Switch to R8_UNORM format for compatiblitySagar Ghuge2020-02-131-0/+9
| | | | | | | | | | | | | | | | | | | | | | | Gen12 added CCS_E support for A8_UNORM. Intercept A8_UNORM format and switch to R8_UNORM, as both share the same aux map format encoding so they are compatible. Fixes Piglit's ext_framebuffer_multisample-formats all_samples, which was hitting an assert about A8_UNORM and R8_UINT not being CCS_E compatible formats. v2: Add gen check (Kenneth Graunke) v3: Intercept A8_UNORM and set format to R8_UNORM (Jason Ekstrand) v4: - Remove gen check and move block little bit down (Jason Ekstrand) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3719>
* intel/isl: Move iris's pipe-to-isl format function to isl.Eric Anholt2020-02-051-0/+299
| | | | | | | | | | This will get reused in the shader compiler once we switch it over to pipe formats instead of GL enums. We can't easily deduplicate i965's mesa-to-isl mapping because of cases like A32_FLOAT that are mapped differently. Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
* intel/isl: Allow CCS_E on more formatsJason Ekstrand2020-01-251-23/+4
| | | | | | | | | Now that BLORP supports copies on everything except R11G11B10_FLOAT, we should be able to support CCS_E those formats. Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3554> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3554>
* intel: Enable CCS_E for R24_UNORM_X8_TYPELESS on TGL+Nanley Chery2019-10-281-1/+1
| | | | | | | | While this format isn't listed in BSpec: 53911, other documentation and empirical evidence suggest that it's fine to remap it to R32_FLOAT. I've filed a bug for the BSpec page. Reviewed-by: Kenneth Graunke <[email protected]>
* intel: Enable CCS_E for some formats on Gen12Nanley Chery2019-10-281-29/+44
| | | | | | | | | | | | | | | | | In ISL: Update the format table to add CCS_E support for some 8BPP formats, some 16BPP formats, and R10G10B10A2_UNORM_SRGB. In the helper for determining CCS_E support, we return false for some 16BPP formats because they aren't properly handled in blorp_copy(). In BLORP: Allow the new and non-problematic formats for CCS_E-enabled copies. v2. Update other fields for A1B5G5R5_UNORM and A4B4G4R4_UNORM in table. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> (v1)
* isl: Disable CCS_D on Gen12+Nanley Chery2019-10-281-2/+4
| | | | | | | | | | Clear-only compression no longer exists on TGL. v2. Add BSpec reference. (Sagar) Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* intel/isl: Add R10G10B10_FLOAT_A2_UNORM formatJordan Justen2019-10-171-0/+1
| | | | | | | | | | Reworks: * Fill out the format's entry in the ISL format table. (Nanley) * Support CCS_E-enabled BLORP copies with the format. (Nanley) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Sagar Ghuge <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* isl/formats: R8G8B8_UNORM_SRGB isn't supported on HSWJason Ekstrand2019-07-291-1/+5
| | | | | | | | | On Haswell, the format works but it doesn't properly do an sRGB decode. It appears to act identically to R8G8B8_UNORM. Only Vulkan uses this format so this only affects Vulkan on HSW. Cc: [email protected] Reviewed-by: Eric Engestrom <[email protected]>
* intel/isl: Add isl_format_has_color_component() function.Rafael Antognolli2019-03-201-0/+22
| | | | | | v2: Get luminance bits from luminance component (Ken). Reviewed-by: Kenneth Graunke <[email protected]>
* intel/isl: Add bounds-checking assertions for the format_info tableJason Ekstrand2018-06-071-8/+16
| | | | | | | | | | | We follow the same convention as isl_format_get_layout in having two assertions to ensure that only valid formats are passed in. We also check against the array size of the table because some valid formats such as CCS formats will may be past the end of the table. This fixes some potential out-of-bounds array access even in valid cases. Cc: [email protected] Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/isl: Several UNORM formats support typed writes on gen11+Jason Ekstrand2018-05-101-13/+13
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Tested-by: Anuj Phogat <[email protected]>
* intel/isl: Allow CCS_E on 1010102 formatsJason Ekstrand2018-05-091-11/+0
| | | | | | | | On CNL and above, CCS_E supports 1010102 formats and R11G11B10F. We had shut them off during early enabling because blorp_copy couldn't handle them. Now it can handle 1010102 formats so we can turn them back on. Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/isl: Add format conversion codeJason Ekstrand2018-05-091-0/+214
| | | | | | | | | | | | | | This adds helpers to ISL to convert an isl_color_value to and from binary data encoded with a given isl_format. The conversion is done using ISL's built-in format introspection so it's fairly slow as format conversions go but it should be fine for a single pixel value. In particular, we can use this to convert clear colors. As a side-effect, we now rely on the sRGB helpers in libmesautil so we need to tweak the build system a bit. All prior uses of src/util in ISL were header-only. Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/isl: Add some helpers for working with RGBX formatsJason Ekstrand2018-05-091-0/+32
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* intel: Split gen_device_info out into libintel_devJordan Justen2018-03-051-1/+1
| | | | | | | | | | | | Split out the device info so isl doesn't depend on intel/common. Now it will depend on the new intel/dev device info lib. This will allow the decoder in intel/common to use isl, allowing us to apply Ken's patch that removes the genxml duplication of surface formats. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* intel/isl: Disable some gen10 CCS_E formats for nowNanley Chery2017-10-311-0/+24
| | | | | | | | | CannonLake additionally supports R11G11B10_FLOAT and four 10-10-10-2 formats with CCS_E. None of these formats fit within the current blorp_copy framework so disable them until support is added. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/isl: Remove 'inline' keywordsMatt Turner2017-08-291-1/+1
| | | | | | | | | | | | | | | | | | | Unless you have data, the compiler knows better than you whether a function should be inlined. Unlike all other cases in this series, the removal of the inline keyword from isl_format_has_channel_type actually changes the resulting binary with gcc-6.3.0: text data bss dec hex filename 7831116 346384 420648 8598148 833284 i965_dri.so before 7830716 346384 420648 8597748 8330f4 i965_dri.so after I think this is likely an improvement. No difference in the resulting binary with clang-4.0. Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* intel/isl/gen7: Allow msaa with 128-bit formatsTopi Pohjolainen2017-07-221-4/+7
| | | | | | | | | | | | | | These formats are already allowed by the i965 GL driver, and the feature seems to work just fine. There are tests for multisampled rendering in piglit: tests/spec/ext_framebuffer_multisample which can be patched to try GL_RGBA16F/32F/16I/16UI/32I/32UI in addition to GL_RGBA/8I. IvyBridge passed all tests with all sample numbers and even with 128-bit formats. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* intel: compiler/i965: fix is_broxton checksLionel Landwerlin2017-06-201-2/+2
| | | | | | | | | | In 5f2fe9302c is_geminilake was introduced for the differenciate broxton from geminilake. Unfortunately I failed as verifying that is_broxton is throughout the code base to mean Gen9lp. Fixes: 5f2fe9302c ("intel: common: add flag to identify platforms by name") Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/cnl: Enable CCS_E and RT support for few formatsAnuj Phogat2017-06-091-9/+9
| | | | | | Suggested-by: Jason Ekstrand <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/cnl: Reformat surface_format_info table to accomodate gen10+Anuj Phogat2017-06-091-263/+263
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* intel/isl: Add ASTC HDR to format lists and helpersNanley Chery2017-05-221-2/+30
| | | | | Reviewed-by: Anuj Phogat <[email protected]> Signed-off-by: Nanley Chery <[email protected]>
* isl/format: Update the R16G16B16X16_FLOAT entryNanley Chery2017-04-241-1/+1
| | | | | | | | | | | The section of the PRM mentioned in the code comment above this table says that this format supports the render target write message. Internal documentation says that this format also supports alpha blending. As a side effect, this allows CCS_D buffers to be created for images with this format. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Nanley Chery <[email protected]>
* intel/isl: Add format metadata for typed reads/writesJason Ekstrand2017-02-141-251/+287
| | | | | | | | This adds two columns to the format table as well as two helpers for determining whether or not a given format is supported for typed reads and writes. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/isl: Add a better comment for format_supports_ccs_eJason Ekstrand2017-02-021-0/+6
| | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* intel/isl: Add a formats_are_ccs_e_compatible helperJason Ekstrand2017-02-021-0/+31
| | | | | | Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* intel/isl: Add a format_supports_ccs_d helperJason Ekstrand2017-02-021-0/+22
| | | | | | | | | Nothing uses this yet but it serves as a nice bit of documentation that's relatively easy to find. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* intel/isl: Rename supports_lossless_compression to supports_ccs_eJason Ekstrand2017-02-021-4/+4
| | | | | | | | | | | | | The term "lossless compression" could potentially mean multisample color compression, single-sample color compression or HiZ because they are all lossless. The term CCS_E, however, has a very precise meaning; in ISL and is only used to refer to single-sample color compression. It's also much shorter which is nice. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* isl/formats: Only advertise sampling for A4B4G4R4 on BroadwellJason Ekstrand2017-01-311-2/+3
| | | | | | | | | This causes hangs on Broadwell if you try to render to it. I have no idea how we managed to not hit this earlier. Tested-by: Mark Janes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: "13.0 17.0" <[email protected]>
* isl: fix VA64 support for double and dvecN vertex attributesSamuel Iglesias Gonsálvez2017-01-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | We use *64*_PASSTHRU formats to upload vertex attributes of 64 bits to avoid conversions. From the BDW PRM, Volume 2d, page 586 (VERTEX_ELEMENT_STATE): "When SourceElementFormat is set to one of the *64*_PASSTHRU formats, 64-bit components are stored in the URB without any conversion. In this case, vertex elements must be written as 128 or 256 bits, with VFCOMP_STORE_0 being used to pad the output as required. E.g., if R64_PASSTHRU is used to copy a 64-bit Red component into the URB, Component 1 must be specified as VFCOMP_STORE_0 (with Components 2,3 set to VFCOMP_NOSTORE) in order to output a 128-bit vertex element, or Components 1-3 must be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex element. Likewise, use of R64G64B64_PASSTHRU requires Component 3 to be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex element." v2,v3 (Jason): - Don't delete unused formats. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* isl: Mark A4B4G4R4_UNORM as supported on gen8Jason Ekstrand2017-01-061-1/+4
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Cc: "13.0" <[email protected]>
* isl/format: Correct ASTC entries of format info tableNanley Chery2016-10-241-28/+42
| | | | | | | | | With the isl_format_supports* helpers, we can now conveniently report support for this format on Cherry View. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92925 Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/isl: Allow multisampling with ISL_FORMAT_HiZJason Ekstrand2016-10-031-2/+9
| | | | | | | | | | | | | HiZ buffers can be multisampled and, on Broadwell and earlier, simply using interleaved multisampling with a compression block size of 8x4 samples yields the correct HiZ surface size calculations. Unfortunately, choose_msaa_layout was rejecting multisampled HiZ buffers because of format checks. Now that we have a simple helper for determining if a format supports multisampling, that's an easy enough issue to fix. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* intel/isl: Add a format_supports_multisampling helperJason Ekstrand2016-10-031-0/+28
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* intel: s/brw_device_info/gen_device_info/Jason Ekstrand2016-09-031-8/+8
| | | | | | | | | | | | | Generated by: sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.c sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.h sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.c sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.cpp sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.h Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* intel: Add a new "common" library for more code sharingJason Ekstrand2016-09-031-1/+1
| | | | | | | The first thing to go in this new library is brw_device_info. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* isl/formats: Integer formats are not filterableJason Ekstrand2016-08-231-8/+8
| | | | | | | | | In ca2a8e56285, we updated the format table to add more formats (most of which are new on SKL) but accidentally marked some integer formats as filterable. You can't filter an integer format. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* isl/formats: Update the table with more samplable formatsJason Ekstrand2016-08-231-15/+15
| | | | | | | | There were a lot of formats where support was added on Haswell or later but we never updated the format table. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* isl/formats: Report ETC as being samplable on Bay TrailJason Ekstrand2016-08-231-0/+18
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* isl: Add a helper for getting a depth format from an isl_formatJason Ekstrand2016-08-081-0/+24
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* isl: Add per-gen format introspectionJason Ekstrand2016-05-231-0/+386
| | | | | | This is just a copy-and-paste from brw_surface_formats.c. For the supports_vertex_fetch function, we do a bit more work so that it properly handles Bay Trail.
* isl/format: Add a get_num_channels helperJason Ekstrand2016-04-211-0/+15
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl/format: Add more isl_format_has_type_channel functionsJason Ekstrand2016-04-211-0/+24
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl/format: Break the guts of has_[us]int_channel into a helperJason Ekstrand2016-04-211-18/+16
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Add more helpers for determining if a format is an integer formatJason Ekstrand2016-03-101-0/+14
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* isl: Remove redundant checkJason Ekstrand2016-03-101-2/+1
| | | | The green channel was checked twice.
* Move isl to src/intelJason Ekstrand2016-02-181-0/+95